Commit Graph

93397 Commits

Author SHA1 Message Date
Jason Ekstrand 764cce442e i965/miptree: Rename the non_msrt_mcs functions to _ccs
While we're here, we also make the two support checks static since there
are no users outside intel_mipmap_tree.c.

Reviewed-by: Chad Versace <chadversary@chromium.org>
2017-06-23 12:30:24 -07:00
Jason Ekstrand a7059a764e i965/miptree: Delete the layered rendering resolve
We never fast-clear more than the base slice (LOD 0, layer 0) anyway, so
layered rendering without a resolve is always perfectly safe.  Should
this ever change in the future, we'll have to put some sort of resolve
back in but we can cross that bridge when we come to it.

Reviewed-by: Chad Versace <chadversary@chromium.org>
2017-06-23 12:30:24 -07:00
Anuj Phogat 7896dee349 anv/cnl: Don't write to Cache Mode Register 1 on gen10+
For PartialResolveDisableInVC field recommendation is to
always set this to 0 and that's the default value of the bit.
So, we have nothing left to write to CACHE_MODE_1.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-23 11:16:00 -07:00
Anuj Phogat b980553309 i965/cnl: Don't write to Cache Mode Register 1 on gen10+
With below optimizations gone in gen10+ we have nothing left out to
write to CACHE_MODE_1:
Float Blend Optimization Enable: This bit have been removed in gen10+
Partial Resolve Disable in VC: Recommendation is to always set this
field to 0 in gen10+ and that's the default value of the bit.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-23 11:16:00 -07:00
Marek Olšák f6e98e99e3 radeonsi: unreference vertex buffers when destroying the context
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-06-23 19:53:54 +02:00
Edmondo Tommasina 2ea16f08f3 drirc: Add glsl_correct_derivatives_after_discard for The Witcher 2
This fixes the long-standing problem with black transitions in The Wicher 2.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98238

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák ee16796d54 radeonsi: implement the workaround for Rocket League - postponed TGSI kill
Do KILL at the end of shaders so as not to break WQM.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100070

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák a98a04ec80 gallium/radeon: pass create_screen flags to r600_common_screen_init
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák 118b2008ba st/dri: add a drirc workaround for Rocket League
This needs to be passed to gallium drivers.

No game fix is planned at this time.

The addition of glsl_correct_derivatives_after_discard is
generally a good thing for mesa compatibility with the broader GL
driver ecosystem.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100070

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák 6b0f6e693b st/dri: get drirc options before creating pipe_screen
dri_init_options_get_screen_flags will return the flags for create_screen().

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák 76f379330a gallium: allow passing 'unsigned flags' to create_screen()
for drirc options

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák 516488bb51 mesa: don't flush vertices in glClientActiveTexture
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-06-23 19:50:20 +02:00
Marek Olšák 522173aee4 mesa: don't flag _NEW_ARRAY for GL_PRIMITIVE_RESTART_NV
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-06-23 19:50:20 +02:00
Roland Scheidegger c7688d2de5 llvmpipe:fix using 32bit rasterization mistakenly, causing overflows
We use the bounding box (triangle extents) to figure out if 32bit rasterization
could potentially overflow. However, we used the bounding box which already got
rounded up to 0 for negative coords for this, which is incorrect, leading to
overflows and hence bogus rendering in some of our private use.

It might be possible to simplify this somehow (we're now using 3 different
boxes for binning) but I don't quite see how.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-23 19:39:29 +02:00
Roland Scheidegger 672d245ffe llvmpipe: fill in debug vertex info for tri rasterization
This is pretty useful for debugging rasterization issues, so turn it on
based on DEBUG (the actual existence of the fields is also conditionalized
on DEBUG, lines fill it out the same too).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-23 19:39:29 +02:00
Marek Olšák c2f82fc1d3 Revert "radeonsi: don't emit partial flushes at the end of IBs (v2)"
This reverts commit c9040dc9e7.

People have reported it causes corruption on VI, and I see GPU hangs
on GFX9.
2017-06-23 19:13:55 +02:00
Samuel Pitoiset 7f7487f262 mesa: remove spurious flush in _mesa_Viewport()
I don't think this is actually required, if the viewport
values are different from the ones stored in the context, we
already flush and trigger _NEW_VIEWPORT in
set_viewport_no_notify().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-06-23 16:26:25 +02:00
Samuel Pitoiset 2f76b45415 mesa: remove spurious flush in _mesa_DepthRange()
I don't think this is actually required, if the depth range
values are different from the ones stored in the context, we
already flush and trigger _NEW_VIEWPORT in
set_depth_range_no_notify().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-06-23 16:26:25 +02:00
Samuel Pitoiset f314a532fd mesa: do not trigger _NEW_TEXTURE_STATE in glActiveTexture()
This looks like useless because gl_context::Texture::CurrentUnit
is not used by _mesa_update_texture_state() and friends.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-06-23 16:26:24 +02:00
Samuel Pitoiset c244c25ce3 mesa: add KHR_no_error support for glViewport()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-23 09:26:43 +02:00
Samuel Pitoiset ad0afa87b8 mesa: add viewport() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-23 09:26:43 +02:00
Samuel Pitoiset 128822c59f mesa: add KHR_no_error support for glViewportArrayv()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-23 09:26:43 +02:00
Samuel Pitoiset e1d6de7a1e mesa: add viewport_array() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-23 09:26:43 +02:00
Samuel Pitoiset 0a667f03bb mesa: add KHR_no_error support for glViewportIndexed*()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-23 09:26:43 +02:00
Samuel Pitoiset efd42b5791 mesa: rename ViewportIndexedf() to viewport_indexed_err()
While are at it, add a 'context' parameter for consistency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-23 09:26:43 +02:00
Samuel Pitoiset 52a448c7d0 mesa: add KHR_no_error support for glClipControl()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-23 09:26:42 +02:00
Samuel Pitoiset 5a6779c722 mesa: add clip_control() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-23 09:26:42 +02:00
Rafael Antognolli 9fd0aee17d i965: Convert upload_default_color to genxml.
This function was moved to genX_state_upload.c but was still not using genxml.
By converting it to genxml, we make some things simpler, like setting
haswell's border color state, but others are more complex, since the structs
used by each gen are different.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-06-22 16:51:51 -07:00
Rafael Antognolli e547915935 i965: Remove unused code and delete file.
The sampler state code was all moved to genxml, so we can get rid of these
functions and delete the file.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-06-22 16:51:51 -07:00
Rafael Antognolli e30bbe32a3 i965: Convert vs, gs, tcs, tes and cs samplers to genxml.
Since they just use the code that is already available in genX_state_upload.c,
convert them in one batch.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-06-22 16:51:51 -07:00
Rafael Antognolli f8d69beed4 i965: Convert fs sampler state to use genxml.
Also convert some auxiliary functions used by it, and copy
upload_default_color to genX_state_upload.c.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-06-22 16:51:47 -07:00
Rafael Antognolli 9b78a52042 genxml: fix gen5 sampler border color state.
Based on the current code, gen5 and gen6 have the same sampler border color
state struct. So fix the gen5 one to match gen6.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-06-22 16:38:44 -07:00
Rafael Antognolli f43c21cbbd aubinator: Dump sampler state pointers on gen6 too.
We already have a function to dump sampler states, so do that for gen6
too.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-06-22 16:38:44 -07:00
Chad Versace ecd8f85802 anv: Fix -Wswitch in anv_layout_to_aux_usage()
anv_layout_to_aux_usage() lacked a case for
VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR. Add an unreachable case, because we
don't support the extension.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-22 15:18:24 -07:00
Chad Versace 55f335bd30 i965: Fix -Wunused-variable in gen8_write_pma_stall_bits()
Trivial fix.  'ctx' was unused.
2017-06-22 14:44:06 -07:00
Anusha Srivatsa de7ed0ba55 i965/CFL: Add PCI Ids for Coffee Lake.
Coffee Lake has a gen9 graphics following KBL.
From 3D perspective, CFL is a clone of KBL/SKL features.

v2: Change commit message, correct alignment <Anuj Phogat>
v3: Update IDs.
v4: Initialize l3_banks, correct nomenclature <Anuj>

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: Benjamin Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2017-06-22 14:28:43 -07:00
Anuj Phogat 43d11b128c intel: Enable vulkan build for gen10
This patch just enables building Vulkan libs for gen10. We
still don't have gen 10 support enabled on Vulkan.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-22 14:17:46 -07:00
Anuj Phogat ac6bc0e034 anv/cnl: Generate and use gen10 functions
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-22 14:17:45 -07:00
Anuj Phogat c17e214a6b anv/cnl: Don't set FloatBlendOptimizationEnable{Mask}
This field is remove from CACHE_MODE_1 register in gen10.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-22 14:17:45 -07:00
Anuj Phogat bf1d2c37c6 anv/cnl: Use GENX(xx) in place of GEN9_xx
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-22 14:17:45 -07:00
Anuj Phogat 1e5a5d18d1 anv/cnl: Add #defines for MOCS and genX(x)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-22 14:17:45 -07:00
Anuj Phogat ceed55e7bb intel/genxml: Add Gen10 CACHE_MODE_1 definitions
Few of the fields in this register are changed as compared
to gen9.xml.

V2: Remove some fields which are not valid anymore.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-06-22 14:17:45 -07:00
Anuj Phogat 6338b63270 intel/genxml: Rename StartInstanceLocation to StartingInstanceLocation
This is required because we already have a macro defined with
the name StartInstanceLocation.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-06-22 14:17:45 -07:00
Anuj Phogat 8869c8b3dc intel/genxml: Rename IndirectStatePointer to BorderColorPointer
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-06-22 14:17:45 -07:00
Anuj Phogat 97f75fdfd0 intel/genxml: Combine DataDWord{0, 1} fields in to ImmediateData field
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-06-22 14:17:45 -07:00
Anuj Phogat c61b909d14 intel/genxml: Add INSTDONE registers in gen10
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-06-22 14:17:45 -07:00
Anuj Phogat 03fddd3c1d intel/genxml: Add better support for MI_MATH in gen10
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-06-22 14:17:45 -07:00
Chad Versace a9e5e9f5ec i965/dri: Add intel_screen param to intel_create_winsys_renderbuffer
The param is currently unused. It will later be used it to support
R8G8B8X8 EGLConfigs on Skylake.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-22 12:44:28 -07:00
Chad Versace 4b9cbfa0b0 i965: Move brw_context format arrays to intel_screen
This allows us to query the driver's supported formats in i965's DRI code,
where often there is available a DRIscreen but no GL context.

To reduce diff noise, this patch does not completely remove
brw_context's format arrays. It just redeclares them as pointers which
point to the arrays in intel_screen.

Specifically, move these two arrays from brw_context to intel_screen:
    mesa_to_isl_render_format[]
    mesa_format_supports_render[]

And add a new array to intel_screen,
    mesa_format_supportex_texture[]
which brw_init_surface_formats() copies to ctx->TextureFormatSupported.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-22 12:44:28 -07:00
Chad Versace c09b2aefae i965: Rename some vague format members of brw_context
I'm swimming in a vortex of formats. Mesa formats, isl formats, DRI
formats, GL formats, etc.

It's easy to misinterpret the following brw_context members unless
you've recently read their definition.  In upcoming patches, I change
them from embedded arrays to simple pointers; after that, even their
definition doesn't help, because the MESA_FORMAT_COUNT hint will no
longer be present.

Rename them to prevent further confusion. While we're renaming, choose
shorter names too.

    -format_supported_as_render_target
    +mesa_format_supports_render

    -render_target_format
    +mesa_to_isl_render_format

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-22 12:43:53 -07:00