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3069 Commits

Author SHA1 Message Date
Juan A. Suarez Romero 4581bf595b broadcom: follow version naming convention 
We usually name the functions that depend on hardware version as
v3d<version>_foo.

Keep the same convention in QPU and lower_image_load_store, so it makes
easier when searching for versioned functions.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30000>
 2024-07-08 11:19:31 +00:00
Juan A. Suarez Romero a10957adb6 broadcom/qpu: clean all versions not supported 
Right now we only support V3D 4.2 and V3D 7.1, so clean older versions
that were left in the QPU.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30000>
 2024-07-08 11:19:30 +00:00
Eric Engestrom 801ed4d032 ci: simplify setting .no-auto-retry now that it isn't bundled with unrelated rules: 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30004>
 2024-07-07 19:31:44 +00:00
Eric Engestrom f37af2ab8c ci: split .no-auto-retry out of .scheduled_pipeline-rules 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30004>
 2024-07-07 19:31:44 +00:00
Juan A. Suarez Romero 2a3b983728 broadcom/ci: run some GL tests in arm32 arch 
While Raspberry PI OS 64-bit is the suggested version for rpi3 devices
and newers, for older devices like rpi1 to rpi2, which uses the same
GPU, the recommended flavour is 32-bit.

Also, while 64-bit is the recommended version, users can still decide to
use the 32-bit flavour.

Hence, spend a bit of nightly time to run a subset of the OpenGL/ES
tests.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30003>
 2024-07-03 09:40:04 +00:00
Juan A. Suarez Romero 8554feab0c vc4/ci: run tests in 64-bits 
Nowadays the recommended version for Raspberry Pi OS in rpi3 is 64-bits.
Hence, let's run our tests in 64-bits too.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30003>
 2024-07-03 09:40:03 +00:00
Juan A. Suarez Romero a10ea7cec8 broadcom/ci: remove arch from hardware name 
The same device can be run with 32-bits or 64-bits, so no need to
include the arch in the name.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30003>
 2024-07-03 09:40:03 +00:00
Juan A. Suarez Romero a16d7a0ba4 broadcom/ci: read 32-bit kernel from arm32 path 
Makes it clear using arm32 name in contrast to arm64, than armhf.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30003>
 2024-07-03 09:40:03 +00:00
Eric Engestrom 17c081380d broadcom/ci: disable auto-retry on manual jobs 
The v3d manual rules had this line but the vc4 and v3dv ones were
missing it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29999>
 2024-07-03 09:16:16 +00:00
Iago Toral Quiroga 1d418a3419 broadcom/compiler: add missing signal compatibilities for V3D 7.x 
total instructions in shared programs: 11281777 -> 11246706 (-0.31%)
instructions in affected programs: 2230213 -> 2195142 (-1.57%)
helped: 11830
HURT: 487
Instructions are helped.

total max-temps in shared programs: 2226424 -> 2225398 (-0.05%)
max-temps in affected programs: 16833 -> 15807 (-6.10%)
helped: 722
HURT: 23
Max-temps are helped.

total sfu-stalls in shared programs: 14894 -> 14977 (0.56%)
sfu-stalls in affected programs: 138 -> 221 (60.14%)
helped: 30
HURT: 112
Inconclusive result (%-change mean confidence interval includes 0).

total inst-and-stalls in shared programs: 11296671 -> 11261683 (-0.31%)
inst-and-stalls in affected programs: 2230218 -> 2195230 (-1.57%)
helped: 11796
HURT: 495
Inst-and-stalls are helped.

total nops in shared programs: 270280 -> 270622 (0.13%)
nops in affected programs: 6492 -> 6834 (5.27%)
helped: 145
HURT: 349
Nops are HURT.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29995>
 2024-07-03 08:05:37 +02:00
Qiang Yu 3151f5ec47 nir: add filter parameter to nir_lower_array_deref_of_vec 
To be used by latter commits to limit the lowering to specific
variables.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29799>
 2024-07-03 02:06:56 +00:00
Juan A. Suarez Romero fc286867fb v3dv: fix misalignment in descriptor layout structure 
Current memory layout for v3dv_descriptior_set_layout structure is the
following:

```
                                                                  /* offset           size */
type = struct v3dv_descriptor_set_layout {
    struct vk_object_base base;                                   /*   0                64 */
    VkDescriptorSetLayoutCreateFlags flags;                       /*  64                 4 */
    uint32_t binding_count;                                       /*  68                 4 */
    uint32_t bo_size;                                             /*  72                 4 */
    uint16_t shader_stages;                                       /*  76                 2 */
                                                                  /*         PAD 2         */
    uint32_t descriptor_count;                                    /*  80                 4 */
    uint16_t dynamic_offset_count;                                /*  84                 2 */
                                                                  /*         PAD 2         */
    uint32_t ref_cnt;                                             /*  88                 4 */
    struct v3dv_descriptor_set_binding_layout binding[0];         /*  92                32 */
}                               [...]         binding[1];         /* 124                32 */
```

Besides wasting 4 bytes in padding, the main problem is that `binding`
fields are not aligned to 8 bytes (64-bits), which is undefined behaviour
in C.

Just moving `descriptor_count` field below we get the new layout:

```
                                                                  /* offset           size */
type = struct v3dv_descriptor_set_layout {
    struct vk_object_base base;                                   /*   0                64 */
    VkDescriptorSetLayoutCreateFlags flags;                       /*  64                 4 */
    uint32_t binding_count;                                       /*  68                 4 */
    uint32_t bo_size;                                             /*  72                 4 */
    uint16_t shader_stages;                                       /*  76                 2 */
    uint16_t dynamic_offset_count;                                /*  78                 2 */
    uint32_t descriptor_count;                                    /*  80                 4 */
    uint32_t ref_cnt;                                             /*  84                 4 */
    struct v3dv_descriptor_set_binding_layout binding[0];         /*  88                32 */
}                               [...]         binding[1];         /* 120                32 */
```

Which removes the padding requirement, and more important, make the
`binding` pointers to be correctly aligned.

This has been detected by the Undefined Behaviour Sanitizer (UBSan).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911>
 2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero 9696fd378a v3dv: restrict to channels when encoding border color 
Not all the formats have 4 channels, so let's restrict the border
encoding to the number of channels.

This has been detected by the Undefined Behaviour Sanitizer (UBSan).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911>
 2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero 3ee47dc6d9 v3dv: do not pass NULL pointer to function not expecting NULLs 
memcpy() pointers arguments are declared to be non NULL.

This has been detected by Undefined Behaviour Sanitizer (UBSan).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911>
 2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero 1d71be8e60 v3dv: do not access member of a NULL structure 
Check if the structure is NULL before trying to get access to its
members.

This has been detected by the Undefined Behaviour Sanitizer (UBSan).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911>
 2024-07-01 08:02:07 +00:00
Juan A. Suarez Romero 7dc6b8df11 broadcom/compiler: use unsigned types when performing bitshifting 
Ensure unsigned integers are used instead of signed ones when performing
left bit shifts.

This has been detected by the Undefined Behaviour Sanitizer (UBSan).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29911>
 2024-07-01 08:02:07 +00:00
David Heidelberg 68215332a8 build: pass licensing information in SPDX form 
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29972>
 2024-06-29 12:42:49 -07:00
Eric Engestrom e1b1114bc2 v3d/ci: add nightly job for rusticl testing 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851>
 2024-06-27 17:49:02 +00:00
Eric Engestrom 70dfe9c6d1 ci: include rusticl in the arm64 build 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851>
 2024-06-27 17:49:02 +00:00
Mike Blumenkrantz 332252966b ci: kill filament trace globally 
this one is flaky and pointless

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29937>
 2024-06-27 14:36:13 +00:00
Iago Toral Quiroga 4e6b675974 broadcom/compiler: drop multop if we dce umul24 
We always emit multop+umul24 to implement integer multiply and
this is the only scenario in which we use multop, so if we decide
to DCE umul24 we should also DCE the previous multop.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909>
 2024-06-27 06:43:09 +00:00
Iago Toral Quiroga 0a7a36372f broadcom/compiler: validate rtop + thrsw hazard 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909>
 2024-06-27 06:43:09 +00:00
Iago Toral Quiroga d1f8351f3c broadcom/compiler: fix per-quad spilling 
This is not safe when we have conditional spills since we could be
spilling disabled lanes with undefined values that could overwrite
valid data for those lanes from a previous spill of the same temp
that was unconditional (or that condionally enabled those same
lanes).

Fixes some Piglit OpenCL tests as well as the following OpenCL tests:
integer_divideAssign
integer_moduloAssign
integer_mad_sat
integer_ops integer_divideAssign
integer_ops integer_mad_sat
integer_ops integer_moduloAssign
integer_ops quick_char_math
integer_ops quick_short_math
math_brute_force half_powr
math_brute_force pow
math_brute_force pown
math_brute_force powr
math_brute_force rootn

Fixes: 597560e27c ('broadcom/compiler: always enable per-quad on spill operations')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909>
 2024-06-27 06:43:09 +00:00
Iago Toral Quiroga 38b7f411a1 broadcom/compiler: don't spill in between multop and umul24 
The multop instruction implicitly writes rtop which is not preserved
acrosss thread switches. We can spill the sources of the multop
(since these would happen before multop) and the destination of
umul24 (since that would happen after umul24).

Fixes some OpenCL tests when V3D_DEBUG=opt_compile_time is used to
choose a different compile configuration.

cc: mesa-stable

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909>
 2024-06-27 06:43:09 +00:00
Karol Herbst 742984a325 broadcom/compiler: handle variable shared memory 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:03 +00:00
Karol Herbst 9bf0b3a112 broadcom/compiler: call nir_lower_64bit_phis 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:03 +00:00
Karol Herbst 4a169a518e broadcom/compiler: implement load_kernel_input 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:03 +00:00
Karol Herbst caa3872f76 broadcom/compiler: abort on unknown intrinsics 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:03 +00:00
Karol Herbst f8ab9c0e93 broadcom/compiler: handle up to vec16 load_uniforms 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:03 +00:00
Karol Herbst e050b13777 broadcom/compiler: try handling 8/16 bit alu operations 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:02 +00:00
Karol Herbst c7f9cca985 broadcom/compiler: fix iu2f32 for 8 and 16 bit inputs 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:02 +00:00
Karol Herbst 214121e9b0 broadcom/compiler: handle fp16 conversion ops 
As long as fp16 isn't advertized it's not doing much, but it also doesn't
hurt to add them.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:02 +00:00
Karol Herbst c2ec65eeda broadcom/compiler: add generated v3d_nir_lower_algebraic 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
 2024-06-26 10:04:02 +00:00
Alyssa Rosenzweig da752ed7c1 treewide: use nir_def_replace sometimes 
Two Coccinelle patches here. Didn't catch nearly as much as I would've liked but
it's a start.

Coccinelle patch:

    @@
    expression intr, repl;
    @@

    -nir_def_rewrite_uses(&intr->def, repl);
    -nir_instr_remove(&intr->instr);
    +nir_def_replace(&intr->def, repl);

Coccinelle patch:

    @@
    identifier intr;
    expression instr, repl;
    @@

    nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
    ...
    -nir_def_rewrite_uses(&intr->def, repl);
    -nir_instr_remove(instr);
    +nir_def_replace(&intr->def, repl);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com> [broadcom]
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> [lima]
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com> [etna]
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com> [r300]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29817>
 2024-06-21 15:36:56 +00:00
Iago Toral Quiroga e59f8faf8a v3dv: don't call wsi_device_init too early 
Since a5d59a50a9 this relies on the device capabilities to be already
cached in the device.

Fixes some crashes with WSI stuff, like vkcube-wayland or
dEQP-VK.wsi.wayland.swapchain.modify.resize.

Fixes: a5d59a50a9 ('v3dv: Use common runtime vk_properties')
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11363
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29798>
 2024-06-20 10:21:26 +00:00
Juan A. Suarez Romero 5f27c4cc4e v3dv/ci: add new timeouts 
Add a set of tests that takes too much time to run in rpi5.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29788>
 2024-06-19 18:04:36 +02:00
Iago Toral Quiroga 02f33b7d92 broadcom/compiler: initialize payload_conflict for all initial nodes 
Fixes: cb83f25b39 ('broadcom/compiler: don't assign payload registers to spilling setup temps')
cc: mesa-stable

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29759>
 2024-06-18 07:19:07 +00:00
Juan A. Suarez Romero 7dcba7e873 v3dv/ci: fix spurious line in expected 
Fixes: c8c9d1a802 ("v3dv/ci: add expected failure")
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29763>
 2024-06-18 08:48:38 +02:00
Juan A. Suarez Romero c8c9d1a802 v3dv/ci: add expected failure 
This was caused when enabling VK_KHR_maintenance5 extension, but the
problem is fixed using a new Vulkan Loader.

Fixes: a589901328 ("v3dv: expose VK_KHR_maintenance5")
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29756>
 2024-06-17 22:03:01 +00:00
Alyssa Rosenzweig 15257b65c6 treewide: use nir_metadata_control_flow 
Via Coccinelle patch:

    @@
    @@

    -nir_metadata_block_index | nir_metadata_dominance
    +nir_metadata_control_flow

...plus some manual fixups for call sites missed by coccinelle.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Juan A. Suarez Romero <jasuarez@igalia.com> [broadcom]
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com> [lima]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29745>
 2024-06-17 16:28:14 -04:00
Daniel Schürmann 7af16e9f1e nir/shader_info: remove uses_demote 
This flag is mostly redundant with uses_discard and was only
introduced to implement demote with LLVM when it didn't have
that intrinsic.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
 2024-06-17 19:37:16 +00:00
Daniel Schürmann 9b1a748b5e nir: remove nir_intrinsic_discard 
The semantics of discard differ between GLSL and HLSL and
their various implementations. Subsequently, numerous application
bugs occurred and SPV_EXT_demote_to_helper_invocation was written
in order to clarify the behavior. In NIR, we now have 3 different
intrinsics for 2 things, and while demote and terminate have clear
semantics, discard still doesn't and can mean either of the two.

This patch entirely removes nir_intrinsic_discard and
nir_intrinsic_discard_if and replaces all occurences either with
nir_intrinsic_terminate{_if} or nir_intrinsic_demote{_if} in the
case that the NIR option 'discard_is_demote' is being set.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
 2024-06-17 19:37:16 +00:00
Daniel Schürmann f3d8bd18dd nir: introduce discard_is_demote compiler option 
This new option indicates that the driver emits the same
code for nir_intrinsic_discard and nir_intrinsic_demote.
Otherwise, it is assumed that discard is implemented as
terminate.

spirv_to_nir uses this option in order to directly emit
nir_demote in case of OpKill.

RADV GFX11:
Totals from 3965 (4.99% of 79439) affected shaders:
MaxWaves: 119418 -> 119424 (+0.01%); split: +0.03%, -0.03%
Instrs: 1608753 -> 1620830 (+0.75%); split: -0.18%, +0.93%
CodeSize: 8759152 -> 8785152 (+0.30%); split: -0.18%, +0.48%
VGPRs: 152292 -> 149232 (-2.01%); split: -2.37%, +0.36%
Latency: 9162314 -> 10033923 (+9.51%); split: -0.46%, +9.97%
InvThroughput: 1491656 -> 1493408 (+0.12%); split: -0.10%, +0.22%
VClause: 21424 -> 21452 (+0.13%); split: -0.31%, +0.44%
SClause: 53598 -> 55871 (+4.24%); split: -2.15%, +6.39%
Copies: 90553 -> 90462 (-0.10%); split: -2.91%, +2.81%
Branches: 16283 -> 16311 (+0.17%)
PreSGPRs: 113993 -> 113254 (-0.65%); split: -1.84%, +1.19%
PreVGPRs: 110951 -> 108914 (-1.84%); split: -2.08%, +0.24%
VALU: 963192 -> 963167 (-0.00%); split: -0.01%, +0.01%
SALU: 87926 -> 90795 (+3.26%); split: -2.92%, +6.18%
VMEM: 25937 -> 25936 (-0.00%)
SMEM: 110012 -> 109799 (-0.19%); split: -0.20%, +0.01%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
 2024-06-17 19:37:15 +00:00
Karol Herbst 05b9705ae0 broadcom/compiler: rework scratch lowering 
Let's rely on nir_lower_mem_access_bit_sizes doing all the heavy work, so
v3d_nir_lower_scratch can be cleaned up quite a lot.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711>
 2024-06-17 10:07:56 +00:00
Karol Herbst 75196e86f1 broadcom/compiler: only handle load_uniform explicitly in v3d_nir_lower_load_store_bitsize 
Also use nir_get_io_offset_src_number while at it.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711>
 2024-06-17 10:07:56 +00:00
Karol Herbst a2eff2b9f9 broadcom/compiler: convert 2x32 global operations to scalar variants 
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711>
 2024-06-17 10:07:56 +00:00
Karol Herbst 9827cfe49e broadcom/compiler: use nir_lower_mem_access_bit_sizes for memory lowering 
It does everything we need and allows us to remove a lot of code. It also
helps with supporting vec8/16 and unaligned load/stores for OpenCL.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711>
 2024-06-17 10:07:56 +00:00
Karol Herbst 66b58e8a0e broadcom/compiler: support global load/store intrinsics 
It's the same as global_2x32 as there the 2nd component is ignored anyway

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29711>
 2024-06-17 10:07:56 +00:00
Iago Toral Quiroga a589901328 v3dv: expose VK_KHR_maintenance5 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29669>
 2024-06-17 08:15:27 +00:00
Iago Toral Quiroga 212062f2aa v3dv: fix handling of pipeline flags when pipeline init fails 
We compute and store pipeline flags in the pipeline object but
we may need to access flags even in the case where the pipeline
init fails.

Fixes: 3f3c83a6b7 ('v3dv: handle VkPipelineCreateFlags2CreateInfoKHR')
Fixes: dEQP-VK.pipeline.monolithic.creation_cache_control.graphics_pipelines.batch_pipelines_early_return_maintenance5
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29669>
 2024-06-17 08:15:27 +00:00