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Author SHA1 Message Date
Tapani Pälli
eeffb4e674 intel/dev: update mesa_defs.json from internal database 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34753>
 2025-04-30 11:19:07 +00:00
Danylo Piliaiev
97dc196d42 tu: Add total renderpasses,dispatches to cmdbuf tracepoint 
Makes much easier to identify command buffers when tracing
only them, e.g. to see overall performance.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34588>
 2025-04-30 09:28:50 +00:00
Danylo Piliaiev
99b23235a6 tu: Don't enable secondary command buffer tracepoint by default 
Secondary command buffers don't add much information to the traces, but
add more noise and overhead. In order to disable their tracepoints by
default, a separate "secondary_cmd_buffer" tracepoint is created.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34588>
 2025-04-30 09:28:50 +00:00
Karmjit Mahil
9dfd4a091c tu: Fix segfault in fail_submit KGSL path 
Fixes: ec268fa5b6 ("tu/kgsl: Support u_trace and perfetto")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34749>
 2025-04-30 09:06:47 +00:00
Iago Toral Quiroga
103a16e4fa frontend/dri: don't call set_damage_region with a null resource 
This can happen if texture allocation failed.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34668>
 2025-04-30 07:05:44 +00:00
Iván Briano
29d7b90cfc brw: make HALT instruction act as barrier in new CSE pass 
This brings back c9e33e5cbf ("intel/fs/cse: Make HALT instruction act
as CSE barrier."), from the old CSE pass into the new one.

Fixes new CTS test: dEQP-VK.subgroups.shader_quad_control.terminated_invocation

Fixes: 9690bd369d ("intel/brw: Delete old local common subexpression elimination pass")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34643>
 2025-04-29 20:28:24 +00:00
Mel Henning
b9275b54a1 nak/sm70_encode: Remove unused has_mod parameter 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34750>
 2025-04-29 18:23:43 +00:00
Mel Henning
28d077838f nak/sm70_encode: Encode fneg/fabs for hfma2 src 2 
and also stop legalizing away src 1 modifiers. Both of these are present,
they just move to a different place in the encoding.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34750>
 2025-04-29 18:23:43 +00:00
Mel Henning
1ff7135691 nak: Remove hfma2 src 1 modifiers 
This fixes a compilation issue in Marvel Rivals where the legalization
logic and the encoding logic don't line up, which results in an
assertion failure on this instruction:

    r17 = hfma2 r17.xx -r18.xx 0x3c003c00

The fix here is a little overly restrictive because it turns out we
actually do have modifiers for all 3 sources. Those modifiers will
be added in later commits.

Fixes: 567cae69c3 ("nak: Add 16-bits float operations")
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34750>
 2025-04-29 18:23:43 +00:00
Valentine Burley
d48b3a232c docs: Remove the docs for setting up bare-metal devices 
Bare-metal support is being removed from Mesa, and adding new devices is
no longer supported.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34725>
 2025-04-29 18:16:04 +00:00
Valentine Burley
a587a0a389 docs: Move the docs about caching downloads to LAVA from bare-metal 
The bare-metal page is getting removed, and LAVA was missing this
section.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34725>
 2025-04-29 18:16:04 +00:00
Rhys Perry
6338ed44c5 aco/gfx12: increase maximum vbuffer offset 
fossil-db (gfx1201):
Totals from 301 (0.38% of 79377) affected shaders:
Instrs: 2734478 -> 2728816 (-0.21%); split: -0.21%, +0.00%
CodeSize: 14347476 -> 14306568 (-0.29%)
Latency: 15508055 -> 15502202 (-0.04%); split: -0.04%, +0.00%
InvThroughput: 2846419 -> 2842387 (-0.14%); split: -0.14%, +0.00%
VClause: 68286 -> 68101 (-0.27%); split: -0.30%, +0.03%
SClause: 49487 -> 49500 (+0.03%)
Copies: 207179 -> 206093 (-0.52%); split: -0.57%, +0.04%
Branches: 72941 -> 72942 (+0.00%); split: -0.00%, +0.00%
VALU: 1549156 -> 1544727 (-0.29%); split: -0.29%, +0.00%
SALU: 339620 -> 338989 (-0.19%); split: -0.19%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34730>
 2025-04-29 17:44:41 +00:00
Rhys Perry
d987d5e341 aco/gfx12: increase maximum global/scratch offset 
fossil-db (gfx1201):
Totals from 29 (0.04% of 79377) affected shaders:
Instrs: 1439082 -> 1439070 (-0.00%)
CodeSize: 7641688 -> 7641608 (-0.00%)
Latency: 9836296 -> 9836280 (-0.00%)
VALU: 799504 -> 799496 (-0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34730>
 2025-04-29 17:44:41 +00:00
Rhys Perry
02d193f058 aco/gfx12: increase maximum smem offset 
fossil-db (gfx1201):
Totals from 55 (0.07% of 79377) affected shaders:
Instrs: 3203775 -> 3200809 (-0.09%)
CodeSize: 16817140 -> 16813440 (-0.02%); split: -0.04%, +0.02%
Latency: 17838315 -> 17829658 (-0.05%)
InvThroughput: 3352905 -> 3351689 (-0.04%)
SClause: 57377 -> 57273 (-0.18%)
Copies: 231006 -> 230941 (-0.03%)
SALU: 436900 -> 435234 (-0.38%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34730>
 2025-04-29 17:44:41 +00:00
Rhys Perry
c26851b80b aco: increase max_const_offset_plus_one for SMEM load_global 
fossil-db (gfx1201):
Totals from 1115 (1.40% of 79377) affected shaders:
Instrs: 1473805 -> 1467571 (-0.42%); split: -0.43%, +0.01%
CodeSize: 7852972 -> 7819656 (-0.42%); split: -0.44%, +0.02%
SpillSGPRs: 1632 -> 1460 (-10.54%); split: -11.27%, +0.74%
Latency: 11975762 -> 11971915 (-0.03%); split: -0.05%, +0.02%
InvThroughput: 2496961 -> 2496448 (-0.02%); split: -0.03%, +0.01%
VClause: 25213 -> 25218 (+0.02%); split: -0.00%, +0.02%
SClause: 28822 -> 28565 (-0.89%); split: -1.41%, +0.52%
Copies: 106377 -> 105715 (-0.62%); split: -1.23%, +0.61%
Branches: 27497 -> 27473 (-0.09%)
PreSGPRs: 52071 -> 51310 (-1.46%)
VALU: 871051 -> 870694 (-0.04%); split: -0.04%, +0.00%
SALU: 186090 -> 181811 (-2.30%); split: -2.32%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34730>
 2025-04-29 17:44:41 +00:00
Rhys Perry
f390893a64 aco/gfx12: use s_sub_u64 
fossil-db (gfx1201):
Totals from 2 (0.00% of 79377) affected shaders:
Instrs: 243999 -> 243993 (-0.00%)
CodeSize: 1288176 -> 1288152 (-0.00%)
Latency: 1894093 -> 1894091 (-0.00%)
InvThroughput: 378819 -> 378818 (-0.00%)
SALU: 33048 -> 33044 (-0.01%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34730>
 2025-04-29 17:44:41 +00:00
Rhys Perry
5b4813c4f0 aco/gfx12: use s_add_u64 
fossil-db (gfx1201):
Totals from 122 (0.15% of 79377) affected shaders:
Instrs: 3640138 -> 3637577 (-0.07%); split: -0.07%, +0.00%
CodeSize: 19133796 -> 19120080 (-0.07%); split: -0.08%, +0.01%
SpillSGPRs: 666 -> 650 (-2.40%)
SpillVGPRs: 2147 -> 2159 (+0.56%)
Scratch: 254208 -> 255232 (+0.40%)
Latency: 21529337 -> 21522317 (-0.03%); split: -0.04%, +0.00%
InvThroughput: 4048519 -> 4047233 (-0.03%); split: -0.03%, +0.00%
VClause: 90453 -> 90455 (+0.00%)
SClause: 67846 -> 67674 (-0.25%); split: -0.28%, +0.03%
Copies: 287449 -> 287476 (+0.01%); split: -0.04%, +0.05%
Branches: 104526 -> 104530 (+0.00%); split: -0.00%, +0.01%
PreSGPRs: 9795 -> 9723 (-0.74%); split: -0.78%, +0.04%
VALU: 2004219 -> 2003031 (-0.06%); split: -0.06%, +0.00%
SALU: 492651 -> 491737 (-0.19%); split: -0.19%, +0.00%
VMEM: 161317 -> 161341 (+0.01%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34730>
 2025-04-29 17:44:41 +00:00
Sagar Ghuge
821c1bfa7e intel/compiler: Fix stackIDs on Xe2+ 
For Xe2+, from Bspec 64643, bit field "StackID": The maximum number of
StackIDs can be 2^12- 1.

Cc: mesa-stable
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34709>
 2025-04-29 17:03:35 +00:00
Rohan Garg
b9fe5aad37 anv: enable VK_KHR_shader_bfloat16 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
07fa3b3785 intel: Add support for BFloat16 as cooperative matrix source 
Re-organize the configuration lists to make easier to include BFloat16
only for the Gfx125+ that support it, while keeping MTL supporting the
"lowered" configurations from pre-Gfx125.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Rohan Garg
2bbe042e87 spirv: Enable bfloat16 capabilities 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
e0b195cadb spirv: Use bfdot for SpvOpDot with BFloat16 
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
2807097690 spirv: Implement Conversions to/from bfloat16 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
90e1b12890 spirv: Add bfloat16 support to SpecConstantOp 
Handle bfloat16 by converting sources to float, performing the
operation, and converting result back to bfloat16 if needed.  This is
done because not all ALU ops have a `bf` version in NIR.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Rohan Garg
dc8074683d spirv: construct a bfloat16 from the given SPIR-V bitsize and encoding 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
fb6ae2eac1 spirv: Refactor to use glsl_type to pick ALU ops 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
bba607ac2b spirv: Move Convert opcodes handling to its own function 
Take the opportunity to add a comment about why the bit_size
comes from the NIR def and not the original type.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
d4381c0908 brw/cmat: Implement conversion from/to BFloat16 
When converting BFloat16 from/to non-Float32 type, use
the Float32 conversion as an intermediate step.  Take the
opportunity to separate the unary_op/convert code-paths.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
de88184ab6 brw/cmat: Support different src/dst packing factors in emit_packed_alu1 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
7fa7be970d brw/cmat: Extract emit_packed_alu1() function 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
4b4500ad35 brw/cmat: Store more information about cmat slices 
Store the cmat_description and packing_factor so that various
functions don't need to extract and recalculate them.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
a7ff177a88 brw: Consider bfloat16 in lower simd width pass 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
2c31516b3e brw: Consider bfloat16 in lower regioning pass 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
5936768ce0 brw: Consider bfloat16 in copy propagation 
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
129c074811 brw: Implement support for BFloat16 ALU opcodes 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
a38960e8f3 brw, nir: Use glsl_base_type instead of nir_alu_type for @dpas_intel 
This will allow including types that don't have a nir_alu_type
equivalent, like bfloat16.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:37 +00:00
Caio Oliveira
cf4021f93c nir: Add opcodes for BFloat16 
SPV_KHR_bfloat16 requires a small set of operations,
since it doesn't support all the arithmetic ops.

This patch adds conversions to/from Float32 and also
the necessary ops (bfdot, bffma, bfmul) to implement
SpvOpDot using the same lowering approach than the
Float32 counterpart.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:36 +00:00
Rohan Garg
9e5d7eb88d compiler/types: add a bfloat16 type 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:36 +00:00
Caio Oliveira
ecd2d2cf46 util: Add functions to convert float to/from bfloat16 
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:36 +00:00
Caio Oliveira
3e0418ba02 intel/executor: Fix bfloat example for converting F to packed BF 
In float pointing rules adding +0.0f preserves all values except
for -0.0f, so what we want here is to add -0.0f.  In the future
we should add proper support for float immediates in the assembler.

Fixes: fafdd24285 ("intel/executor: Update bfloat example")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
 2025-04-29 16:29:36 +00:00
Mary Guillemard
6ab4ae1a19 pan/bi: Properly lower add/sub with saturation on v11+ 
We were wrongly lowering all add/sub operations with saturation on 8-bit
values on v11+.

This fixes CTS failures on
"dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.*" and
likely more apps.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: d79a31bf81 ("pan/bi: Lower removed instructions in algebraic on v11+")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34743>
 2025-04-29 16:07:19 +00:00
Rhys Perry
20279c28c8 aco/tests: add pseudo-scalar transcendental and fallback path RA tests 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34343>
 2025-04-29 15:15:11 +00:00
Rhys Perry
96e49b7904 aco/ra: add ra_test_policy::use_compact_relocate 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34343>
 2025-04-29 15:15:10 +00:00
Rhys Perry
3c1dbc1d9b aco/ra: cleanup compact_relocate_vars fallback path 
We don't need to duplicate these loops.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34343>
 2025-04-29 15:15:10 +00:00
Rhys Perry
a780345e01 aco: fix compact_relocate_vars fallback with scc/exec/m0 precolored regs 
This probably doesn't fix anything in practice. I don't think this path is
ever taken for SGPRs except for pseudo-scalar transcendental instructions,
and those don't have any precolored operands/definitions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34343>
 2025-04-29 15:15:10 +00:00
Rhys Perry
f6581b41c4 aco/ra: don't require alignment for NPOT SGPR temporaries 
Aligning these can create situations where register allocation is
impossible. Only pseudo-instructions can use these, and they don't require
any alignment.

I'm not sure if these temporaries actually happen in practice. This
probably only affects the get_reg()'s compact_relocate_vars fallback path,
which doesn't usually happen for SGPRs.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34343>
 2025-04-29 15:15:10 +00:00
Rhys Perry
623230a6ef aco/ra: change sorting in compact_relocate_vars 
D16 MIMG or pseudo-scalar transcendental instructions might give lower
limits to the maximum register available for their definitions, so just
try to place them earlier.

This is also part of fixing compact_relocate_vars with aligned NPOT
def/killed-op space (the second part is the later commit which changes
get_stride()).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34343>
 2025-04-29 15:15:10 +00:00
Rob Clark
3f9b8edb1c ci: Re enable fd-farm 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34748>
 2025-04-29 14:41:35 +00:00
Erik Faye-Lund
87e143b053 docs/features: mark off missing panvk extensions 
Seems we forgot to check these two off.

Fixes: 5ed79c2d2b ("panvk: Advertise support for VK_KHR_shader_terminate_invocation")
Fixes: d4998f7ff3 ("panvk: Advertise VK_EXT_shader_demote_to_helper_invocation support")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34747>
 2025-04-29 14:35:20 +00:00
Mary Guillemard
f23f8c2826 panvk: Advertise VK_EXT_depth_bias_control 
This gives more details on the hardware depth bias implementation details.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34745>
 2025-04-29 14:08:37 +00:00