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Author SHA1 Message Date
Alyssa Rosenzweig
998cbe13d4 pan/bi: Fix loads and stores smaller than 32 bits 
Spiritual successor to Icecream95's patch of the same name.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Icecream95
0ca7926bb6 pan/bi: Replace lane0 modifier with lane_dest for load instructions 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Icecream95
b361a806bb pan/bi: Add "lane_dest" modifier 
Similar to the "lane" modifier, but for the instruction destination
instead the sources.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
5fe4f245a5 pan/bi: Implement vectorized int downcasts 
Just MKVEC but needs the usual special handling.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
caebca4aa7 pan/bi: Improve assert for vector size errors 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
2f4bb3d6b9 pan/bi: Fix 16-bit fsat 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
d43c0f35ff pan/bi: Implement vectorized f32_to_f16 
f2f16 needs special treatment since it can access multiple 32-bit words.
Corresponds to the two-op instruction V2F32_TO_V2F16.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
1fb681e51d pan/bi: Emit int CSEL instead of float by default 
Will be needed when we use 1-bit booleans.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
cf2d575d63 pan/bi: Support 16-bit load_interpolated_input 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
d35075a7be pan/bi: Union modifiers from across variants 
itertools.groupby depends on sorting, so this code was quietly broken on
cases like FADD.v2f16.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
394f3f8b74 pan/bi: Simplify Python expression 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
68c4a30434 pan/bi: Don't reference nir_lower_mediump_outputs 
Nonexistant.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
1cb11969be pan/bi: Add simple constant folding pass 
Cleans up swizzle lowering, and will be used for other cleanup as
well (fancy texturing tends to create a lot of foldable code).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
84756b980c pan/bi: Don't reference uninit source in ATOM_C1 
Causes it to be live throughout the shader, causing register allocation
failures on some dEQP-GLES31 shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
f9070f937f pan/bi: Add missing sr_count to pseudo-atomics 
Fixes missing prints for these.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
 2021-05-03 15:10:20 +00:00
Rhys Perry
d918a59d15 radv,ac/llvm: use a dword alignment for descriptor loads 
RADV doesn't try to keep anything 16 or 32 byte aligned. RADV also seems
to create better code for some reason.

fossil-db (Sienna Cichlid):
Totals from 37693 (30.93% of 121873) affected shaders:
SGPRs: 1762792 -> 1785504 (+1.29%); split: -1.01%, +2.30%
VGPRs: 1761032 -> 1760808 (-0.01%); split: -0.09%, +0.07%
SpillSGPRs: 55793 -> 56011 (+0.39%); split: -3.49%, +3.88%
SpillVGPRs: 16766 -> 16387 (-2.26%); split: -3.99%, +1.73%
CodeSize: 82902228 -> 82781608 (-0.15%); split: -0.29%, +0.14%
Scratch: 3024896 -> 2987008 (-1.25%); split: -3.08%, +1.83%
MaxWaves: 919794 -> 920302 (+0.06%); split: +0.09%, -0.03%

shader-db (Sienna Cichlid):
Totals from affected shaders:
SGPRS: 3976 -> 3976 (0.00 %)
VGPRS: 3392 -> 3392 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 178792 -> 178980 (0.11 %) bytes
Max Waves: 1389 -> 1389 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4715
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10543>
 2021-05-03 14:52:40 +00:00
Connor Abbott
3d5c1c4989 tu: Fix SP_GS_PRIM_SIZE for large sizes 
Based on the previous commit.

Fixes: 012773b ("turnip: Configure VPC for geometry shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
 2021-05-03 14:06:24 +00:00
Connor Abbott
e7b7908f87 freedreno/a6xx: Fix SP_GS_PRIM_SIZE for large sizes 
This fixes a few piglit hangs.

Fixes: 0eebedb ("freedreno/a6xx: Emit program state for GS")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
 2021-05-03 14:06:24 +00:00
Connor Abbott
0157076982 freedreno/a6xx: Better document SP_GS_PRIM_SIZE 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
 2021-05-03 14:06:24 +00:00
Bas Nieuwenhuizen
edc600d025 radv: Only require DRM 3.23. 
Turns out kernel 4.15 only goes up to amdgpu 3.23 . 3.35 is way
too new. Too new for e.g. ChromeOS.

Fixes: 1df4f11eb5 ("radv: require DRM 3.35+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4728
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10576>
 2021-05-03 13:55:48 +00:00
Michel Zou
ff58ea7d91 vulkan/wsi: avoid wsi_x11_check_for_dri3 for sw device 
Disabling the check allows swapchains to be created on a remote
X Server using the xlib backend, which in turn allows Vulkan apps,
such as swapchain_images in Vulkan Samples, to run.

Closes #4323

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10349>
 2021-05-03 13:33:08 +00:00
Antonio Caggiano
a67ea63718 panfrost: Fix invalid conversions 
When compiling with a C++ compiler, invalid conversions are treated as
errors unless the fpermissive flag is provided. These changes fix all
invalid conversions encountered while including libpanfrost in a C++
project.

Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10468>
 2021-05-03 13:17:08 +00:00
Alyssa Rosenzweig
a976101da5 nir/opcodes: Reword confusing comment 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10578>
 2021-05-03 12:51:47 +00:00
Samuel Pitoiset
12a00da800 radv/winsys: fix executing huge secondary command buffers on GFX6 
If the secondary has a list of CS buffers, it should be copied to
the primary.

Fixes dEQP-VK.api.command_buffers.record_many_draws_secondary_2.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10547>
 2021-05-03 12:59:21 +02:00
Samuel Pitoiset
92f5ab55f4 radv/winsys: add GFX6_MAX_CS_SIZE instead of using a magic value 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10547>
 2021-05-03 12:58:32 +02:00
Tony Wasserka
741e84f554 aco/spill: Fix improper handling of exec phis 
The "continue" was placed in the wrong loop, leading to exec being
counted as a spilled register when it wasn't.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: a56ddca4e8 ('aco: make all exec accesses non-temporaries')
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4533
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10486>
 2021-05-03 10:31:07 +00:00
Karol Herbst
0c591ace9e nvc0: fix implicit-fallthrough gcc warning 
gcc warning:
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c: In function ‘nvc0_screen_get_compute_param’:
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c:623:7: warning: this statement may fall through [-Wimplicit-fallthrough=]
  623 |       switch (obj_class) {
      |       ^~~~~~
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c:634:4: note: here
  634 |    case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE: /* l[] */
      |    ^~~~

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10544>
 2021-05-03 10:21:05 +00:00
Karol Herbst
99d4b13a32 nv50/query: fix stringop-overflow gcc warning 
gcc warning:
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c: In function ‘nv50_hw_metric_get_query_result’:
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:140:26: warning: ‘sm11_hw_metric_calc_result’ accessing 64 bytes in a region of size 32 [-Wstringop-overflow=]
  140 |    *(uint64_t *)result = sm11_hw_metric_calc_result(hq, res64);
      |                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:140:26: note: referencing argument 2 of type ‘uint64_t *’ {aka ‘long unsigned int *’}
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:105:1: note: in a call to function ‘sm11_hw_metric_calc_result’
  105 | sm11_hw_metric_calc_result(struct nv50_hw_query *hq, uint64_t res64[8])
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10544>
 2021-05-03 10:21:05 +00:00
Icecream95
64246c3ae4 panfrost: Split panfrost_batch_submit to prevent stack overflows 
panfrost_batch_submit can recurse to hundreds of levels to submit
dependencies, so split the actual submit code from the dependency
recursion, saving over a kilobyte of stack space per recursion
level. Enforce this with ATTRIBUTE_NOINLINE.

Use ATTRIBUTE_NOINLINE on panfrost_batch_submit itself as well to
prevent GCC from inlining the function into itself, which would use a
few hundred bytes of stack.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10574>
 2021-05-03 08:58:58 +00:00
Samuel Pitoiset
8b31092bcd radv: only keep concurrent MSAA images compressed if TC-compat CMASK 
Otherwise, we need a FMASK_DECOMPRESS which is only supported
on the gfx queue.

Fixes rendering with Forza Horizon 4 on Polaris10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10482>
 2021-05-03 08:38:31 +00:00
Samuel Pitoiset
80f55e5163 radv: check if DCC is enabled when resolving different levels 
Fixes an assertion triggered by new CTS:
dEQP-VK.renderpass2.suballocation.multisample_resolve.*_resolve_level_*

Looks like the driver should pass a range to radv_layout_dcc_compressed().

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10502>
 2021-05-03 08:23:54 +02:00
Timothy Arceri
40c93e2f45 util: disable glthread in CSGO 
Users have reported a rise in trust factor problems [1] since using
mesa builds containing 6f2017205e. Until we confirm its not a problem
disable glthread.

[1] https://github.com/ValveSoftware/csgo-osx-linux/issues/2630

Fixes: 6f2017205e ("dri: enable glthread + radeonsi workaround for CS:GO")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4710

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10540>
 2021-05-03 05:40:19 +00:00
Alyssa Rosenzweig
080b05e29e asahi: Add Gallium driver 
Forked from noop, with some code from Panfrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:54:05 -04:00
Alyssa Rosenzweig
0ad6bacb73 asahi: Add vertex formats table 
This all gets lowers anyway so it's not entirely clear if this is the
best approach, but these map formats that have native device_load
encodings. (and don't need shader unpack code)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:22 -04:00
Alyssa Rosenzweig
13f5b17078 asahi: Add some magic IOGPU routines 
These turned out to be software defined structures consumed by the macOS
kernel (specifically, by IOGPUCommandQueue). I'm a bit bothered by the
sheer amount of random hex flying about, though Hector made some
progress on deciphering the structure. Nevertheless there's some comfort
knowing it's not actual hardware magic.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:22 -04:00
Alyssa Rosenzweig
7949fa4f9f asahi: Add uniform upload routines 
Effectively everything is treated as a sysval.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:22 -04:00
Alyssa Rosenzweig
c6cde558b5 asahi: Add pool data structure 
Lifted from Panfrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:22 -04:00
Alyssa Rosenzweig
26b19bda30 asahi: Add device abstraction 
Over IOKit or DRM, primarily for memory allocation. Common between
Gallium and Vulkan.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:21 -04:00
Alyssa Rosenzweig
67dd70395f asahi: Add tiling routines 
For the 64x64 Morton order pattern we know how to use for textures and
framebuffers. (AGX also supports a framebuffer compression scheme. This
is not that.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:21 -04:00
Alyssa Rosenzweig
a426abcb46 asahi: Add command buffer decode helpers 
Forked from Panfrost's pandecode. Like pandecode, most of the
heavylifting is generated with GenXML, so this is relatively simple.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:21 -04:00
Alyssa Rosenzweig
55c0956fd0 asahi: Add (clean room) IOKit uABI header 
This only builds on macOS (depends on IOKit), where it is required for
command buffer submission and tracing the Metal blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:21 -04:00
Alyssa Rosenzweig
b67f148db7 asahi: Add a GenXML fork 
Via Panfrost via v3d via Intel. Sour dough!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:21 -04:00
Alyssa Rosenzweig
0f556dbdc0 asahi: Add allocation data structure 
Something half-way between what IOKit (macOS) and DRM (Linux) want.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:20 -04:00
Alyssa Rosenzweig
cad54e2721 asahi: Add command buffer XML definitions 
Formatted for GenXML. Incomplete and probably riddled with errors, but a
good start.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:20 -04:00
Alyssa Rosenzweig
8cca28c9f1 asahi: Add hexdump utility 
Used in our decoder.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:20 -04:00
Alyssa Rosenzweig
87ad9439d3 agx: Support bcsel 
We're already using cmpsel in lots of places, pipe through the real
thing!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:20 -04:00
Alyssa Rosenzweig
e36a7f08df agx: Pack cmpsel 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
d3abe997ca agx: Add b2i implementation 
Another icmpsel variant.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
80edb8124d agx: Implement b2f 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
5a5abdc8d8 agx: Support 1-bit booleans 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00