freedreno/a6xx: Fix SP_GS_PRIM_SIZE for large sizes

This fixes a few piglit hangs.

Fixes: 0eebedb ("freedreno/a6xx: Emit program state for GS")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
This commit is contained in:
Connor Abbott
2021-04-30 18:05:37 +02:00
committed by Marge Bot
parent 0157076982
commit e7b7908f87
3 changed files with 6 additions and 6 deletions
@@ -902,8 +902,13 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_context *ctx,
OUT_PKT4(ring, REG_A6XX_PC_MULTIVIEW_CNTL, 1);
OUT_RING(ring, 0);
uint32_t prim_size = prev->output_size;
if (prim_size > 64)
prim_size = 64;
else if (prim_size == 64)
prim_size = 63;
OUT_PKT4(ring, REG_A6XX_SP_GS_PRIM_SIZE, 1);
OUT_RING(ring, prev->output_size);
OUT_RING(ring, prim_size);
} else {
OUT_PKT4(ring, REG_A6XX_PC_PRIMITIVE_CNTL_6, 1);
OUT_RING(ring, 0);
@@ -515,7 +515,6 @@ spec@glsl-1.50@execution@primitive-id-no-gs-quads,Fail
spec@glsl-1.50@execution@variable-indexing@gs-input-array-float-index-rd,Fail
spec@glsl-1.50@execution@variable-indexing@gs-input-array-vec2-index-rd,Fail
spec@glsl-1.50@execution@variable-indexing@gs-input-array-vec3-index-rd,Crash
spec@glsl-1.50@execution@variable-indexing@gs-input-array-vec4-index-rd,Fail
spec@glsl-1.50@execution@variable-indexing@gs-output-array-vec3-index-wr,Fail
spec@glsl-1.50@execution@variable-indexing@gs-output-array-vec4-index-wr,Crash
spec@glsl-1.50@execution@variable-indexing@vs-output-array-vec3-index-wr-before-gs,Fail
@@ -1,7 +1,3 @@
# Can wedge the GPU
vs-output-array-vec2-index-wr-before-gs
gs-input-array-vec4-index-rd
# These take most of a minute to run
spec@!opengl 3.0@clearbuffer-depth-cs-probe
spec@ext_texture_array@fbo-depth-array depth-clear