AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
212,598 Commits 1 Branch 0 Tags
d3cedd2fa56050636ff898af51aaff6ebec74c2c
Commit Graph

212598 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Zan Dobersek d3cedd2fa5 tu/drm: msm's has_set_iova codepath should avoid freeing zombified tu_sparse_vma 
In msm backend's has_set_iova codepath, mapping a BO into a lazy VMA will
require moving that VMA into the zombie VMA mechanism once the BO is
destroyed. That means tu_sparse_vma destruction should avoid freeing VMA if
BO was mapped into it and then zombified.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 764b3d9161 ("tu: Implement transient attachments and lazily allocated memory")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37413>
 2025-09-22 13:05:34 +00:00
Zan Dobersek 64fc91bb58 tu/drm: msm backend shouldn't use util_vma_heap in the !has_set_iova codepaths 
For the fallback !has_set_iova codepath, util_vma_heap shouldn't be used
for freeing allocations since it's not initialized or used for allocations.

A helper tu_free_iova() function is added to complement tu_allocate_iova(),
handling the vma lock and freeing the allocation in the util_vma_heap when
appropriate.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 93a80f4bb9 ("tu/drm: Split out iova allocation and BO allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37413>
 2025-09-22 13:05:34 +00:00
Zan Dobersek 07a599ff3e tu/drm: avoid has_set_iova-specific util_vma_heap freeing in tu_bo_init 
After the refactoring, tu_bo_init() is not allocating iova anymore so it
should also not free the util_vma_heap allocation for the has_set_iova
case.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 93a80f4bb9 ("tu/drm: Split out iova allocation and BO allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37413>
 2025-09-22 13:05:33 +00:00
Natalie Vock f0d3d0ad21 aco/scheduler: Bail early on unreorderable instructions 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37212>
 2025-09-22 11:13:50 +00:00
Seán de Búrca 53040a1600 rusticl/kernel: remove mutexes from kernel structure 
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37354>
 2025-09-22 10:57:46 +00:00
Seán de Búrca c440beb171 rusticl/kernel: add Kernel::mut_ref_from_raw() 
The OpenCL spec indicates that functions which modify `cl_kernel` are
not thread-safe, allowing us to handle those functions with standard
mutability.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37354>
 2025-09-22 10:57:46 +00:00
Ali, Nawwar c75cb1233c amd/vpelib: add FL capabilitie and lut container size 
[WHY]
get a clear definition of fastload support and actual 3d lut
container size

[HOW]
Added related code

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Nawwar Ali <Nawwar.Ali@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:22 +00:00
Nagulendran, Iswara 1cd047c958 amd/vpelib: Handle Destination Rect with zero dimensions 
[Why]
Route case where dest rect has
zero dimensions to perform background
color fill.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Iswara Nagulendran <Iswara.Nagulendran@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:22 +00:00
Assadian, Navid 4c96e8c352 amd/vpelib: Add new colors to visual confirm 
[WHY]
Newly added formats require distinct colors for proper differentiation.

[HOW]
Add new colors, pairwise distinguishable for newly added formats.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Navid Assadian <Navid.Assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:21 +00:00
swscm, z1 d79665066d amd/vpelib: Ensures type-safe comparison for callback assignment 
[WHY & How]
Ensures type-safe comparison for the sys_event callback assignment by
casting the NULL constant to the appropriate function pointer type.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Muhammad Ansari <Muhammad.Ansari@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:21 +00:00
Zhao, Jiali 237ab0778e amd/vpelib: Create Function to Check for Blending Feature 
[HOW]
Created check_blending_support function and condition to check for
readable purpose

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Zhao, Jiali <Jiali.Zhao@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:21 +00:00
Karol Herbst 6f41c62720 rusticl/mesa: make PipeScreen refcounted 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:13 +00:00
Karol Herbst 501f59e159 rusticl/mesa: make PipeScreen transparent 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:13 +00:00
Karol Herbst f7fcd7ed5d rusticl/mesa: rework Context creation 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:12 +00:00
Karol Herbst 6a71ecaad7 rusticl/mesa: add PipeScreen::pipe 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:11 +00:00
Karol Herbst b67be5d829 rusticl/util: make ThreadSafeCPtr Copy, Clone and transparent 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:11 +00:00
Qiang Yu d52452a486 glsl: allow barrier builtin functions for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:50 +00:00
Qiang Yu 9ffbf9f96b glsl: translate mesa stage for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:50 +00:00
Qiang Yu ecb1322737 glsl: flat qualifier is not needed for per primitive IO 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:50 +00:00
Qiang Yu 521aa2e010 glsl: no xfb buffer qualifier for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:50 +00:00
Qiang Yu 8c58bd5acf glsl: lower shared and task playload for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:49 +00:00
Qiang Yu 2b76809dfc glsl: handle explicit location for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:49 +00:00
Qiang Yu bd365d1d2a glsl: handle mesh shader when optimize varying 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:49 +00:00
Qiang Yu 6176b85d2c glsl: add mesh pipeline varying linkage 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:48 +00:00
Qiang Yu 6e41854f1d glsl: pack varying limit check code into functions 
To be shared with mesh shader linkage.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:48 +00:00
Qiang Yu 59f1186af2 glsl: pack vertex pipeline varying linkage into a function 
No functional change, prepare for add mesh pipeline varying
linking.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:48 +00:00
Qiang Yu c6b24b4cc2 glsl: disable mesh shader output remove when separate shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:47 +00:00
Qiang Yu 38d385673f glsl: validate MS/FS interstage in/out variable type 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:46 +00:00
Qiang Yu 6da726c59c glsl: handle per primitive varying when link 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:46 +00:00
Qiang Yu faa9fea7d2 glsl: validate MS/FS interstage in/out block 
Mesh shader output block is always in array type, need
to validate if the mesh shader output array element type
match the fragment shader input type.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:45 +00:00
Qiang Yu ae3c0ac9e9 glsl: gl_nir_link_glsl handle mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:45 +00:00
Qiang Yu 5b87ef9560 glsl: nir_build_program_resource_list support mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:44 +00:00
Qiang Yu 30fde159eb glsl: add mesh shader builtin functions 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:44 +00:00
Qiang Yu 69127db647 glsl: handle mesh shader output block 
Mainly redeclare of gl_MeshPerVertexEXT and gl_MeshPerPrimitiveEXT.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:43 +00:00
Qiang Yu 0e26c48d79 glsl: assign mesh shader output variable array size 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:42 +00:00
Qiang Yu 6a2bf2024d glsl: add mesh shader builtin outputs 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:42 +00:00
Qiang Yu c260aa3928 glsl: add input builtin variables for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:42 +00:00
Qiang Yu 691601e89e glsl: handle work group in layout for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:41 +00:00
Qiang Yu 611370965f glsl: handle max_vertices/primitives for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:40 +00:00
Qiang Yu de22e59231 glsl: handle mesh shader primitive type layout qualifier 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:39 +00:00
Qiang Yu c2a35ae70d glsl: allow shared variables in task and mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:38 +00:00
Qiang Yu 6415cec230 glsl: handle PerPrimitiveEXT qualifier 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:37 +00:00
Qiang Yu b2e9a6d935 glsl: handle taskPayloadSharedEXT variables 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:36 +00:00
Qiang Yu 2b8c273322 glsl: prepare parse state for mesh shader 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:35 +00:00
Qiang Yu 93024ea247 radeonsi: hide real modifier export behind AMD_DEBUG 
Some applications are not ready to handle multi plane
modifiers.

User who want this feature can use AMD_DEBUG=export_modifier
to enable it again.

Fixes: 0a266f0256 ("radeonsi: really support eglExportDMABUFImageQueryMESA")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13917
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37433>
 2025-09-22 01:51:21 +00:00
Qiang Yu 996c0af482 radeonsi: fix use aco/llvm debug options 
They should be moved to shader options.

Fixes: 5c92fe45a1 ("radeonsi: support more than 64 options for AMD_DEBUG")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37433>
 2025-09-22 01:51:21 +00:00
Rob Clark 3a4b3322d4 freedreno/decode: checkreg handling for bitsize/stride 
The initial version was not accounting for reg64 vs reg32, or array
stride.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37502>
 2025-09-21 08:27:00 -07:00
Rob Clark 159d0596c4 freedreno/registers: Fix x_CONTEXT_SWITCH_GFX_PREEMPTION_SAFE_MODE 
The HLSQ version only existed in a6xx.  And the SP one had the wrong
offset.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37484>
 2025-09-20 16:52:22 +00:00
Rob Clark 897a47602a freedreno/registers: Remove conflicting RBBM regs 
These are the same as a6xx, so just keep the declarations without
variants attribute.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37484>
 2025-09-20 16:52:21 +00:00
Rob Clark 68e5f150e3 freedreno/decode: Add test to check for conflicting regs 
Add a tool to check for conflicting/overlapping register definitions.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37484>
 2025-09-20 16:52:21 +00:00