aco/scheduler: Bail early on unreorderable instructions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37212>
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@@ -475,6 +475,22 @@ get_sync_info_with_hack(const Instruction* instr)
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return sync;
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}
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bool
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is_reorderable(const Instruction* instr)
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{
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return instr->opcode != aco_opcode::s_memtime && instr->opcode != aco_opcode::s_memrealtime &&
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instr->opcode != aco_opcode::s_setprio && instr->opcode != aco_opcode::s_getreg_b32 &&
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instr->opcode != aco_opcode::p_shader_cycles_hi_lo_hi &&
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instr->opcode != aco_opcode::p_init_scratch &&
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instr->opcode != aco_opcode::p_jump_to_epilog &&
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instr->opcode != aco_opcode::s_sendmsg_rtn_b32 &&
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instr->opcode != aco_opcode::s_sendmsg_rtn_b64 &&
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instr->opcode != aco_opcode::p_end_with_regs && instr->opcode != aco_opcode::s_nop &&
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instr->opcode != aco_opcode::s_sleep && instr->opcode != aco_opcode::s_trap &&
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instr->opcode != aco_opcode::p_call && instr->opcode != aco_opcode::p_logical_start &&
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instr->opcode != aco_opcode::p_logical_end;
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}
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struct memory_event_set {
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bool has_control_barrier;
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@@ -632,19 +648,6 @@ perform_hazard_query(hazard_query* query, Instruction* instr, bool upwards)
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if (instr->isEXP() || instr->opcode == aco_opcode::p_dual_src_export_gfx11)
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return hazard_fail_export;
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/* don't move non-reorderable instructions */
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if (instr->opcode == aco_opcode::s_memtime || instr->opcode == aco_opcode::s_memrealtime ||
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instr->opcode == aco_opcode::s_setprio || instr->opcode == aco_opcode::s_getreg_b32 ||
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instr->opcode == aco_opcode::p_shader_cycles_hi_lo_hi ||
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instr->opcode == aco_opcode::p_init_scratch ||
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instr->opcode == aco_opcode::p_jump_to_epilog ||
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instr->opcode == aco_opcode::s_sendmsg_rtn_b32 ||
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instr->opcode == aco_opcode::s_sendmsg_rtn_b64 ||
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instr->opcode == aco_opcode::p_end_with_regs || instr->opcode == aco_opcode::s_nop ||
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instr->opcode == aco_opcode::s_sleep || instr->opcode == aco_opcode::s_trap ||
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instr->opcode == aco_opcode::p_call)
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return hazard_fail_unreorderable;
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memory_event_set instr_set;
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memset(&instr_set, 0, sizeof(instr_set));
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memory_sync_info sync = get_sync_info_with_hack(instr);
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@@ -769,7 +772,7 @@ schedule_SMEM(sched_ctx& ctx, Block* block, Instruction* current, int idx)
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break;
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/* break when encountering another MEM instruction, logical_start or barriers */
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if (candidate->opcode == aco_opcode::p_logical_start)
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if (!is_reorderable(candidate.get()))
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break;
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/* only move VMEM instructions below descriptor loads. be more aggressive at higher num_waves
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* to help create more vmem clauses */
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@@ -825,7 +828,7 @@ schedule_SMEM(sched_ctx& ctx, Block* block, Instruction* current, int idx)
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assert(candidate_idx < (int)block->instructions.size());
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aco_ptr<Instruction>& candidate = block->instructions[candidate_idx];
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if (candidate->opcode == aco_opcode::p_logical_end)
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if (!is_reorderable(candidate.get()))
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break;
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/* check if candidate depends on current */
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@@ -906,7 +909,7 @@ schedule_VMEM(sched_ctx& ctx, Block* block, Instruction* current, int idx)
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bool is_vmem = candidate->isVMEM() || candidate->isFlatLike();
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/* Break when encountering another VMEM instruction, logical_start or barriers. */
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if (candidate->opcode == aco_opcode::p_logical_start)
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if (!is_reorderable(candidate.get()))
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break;
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if (should_form_clause(current, candidate.get())) {
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@@ -980,7 +983,7 @@ schedule_VMEM(sched_ctx& ctx, Block* block, Instruction* current, int idx)
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aco_ptr<Instruction>& candidate = block->instructions[candidate_idx];
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bool is_vmem = candidate->isVMEM() || candidate->isFlatLike();
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if (candidate->opcode == aco_opcode::p_logical_end)
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if (!is_reorderable(candidate.get()))
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break;
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/* check if candidate depends on current */
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@@ -1049,7 +1052,7 @@ schedule_LDS(sched_ctx& ctx, Block* block, Instruction* current, int idx)
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for (int i = 0; k < max_moves && i < window_size; i++) {
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aco_ptr<Instruction>& candidate = block->instructions[cursor.source_idx];
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bool is_mem = candidate->isVMEM() || candidate->isFlatLike() || candidate->isSMEM();
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if (candidate->opcode == aco_opcode::p_logical_start || is_mem)
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if (!is_reorderable(candidate.get()) || is_mem)
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break;
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if (candidate->isDS() || candidate->isLDSDIR()) {
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@@ -1073,7 +1076,7 @@ schedule_LDS(sched_ctx& ctx, Block* block, Instruction* current, int idx)
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for (; k < max_moves && i < window_size; i++) {
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aco_ptr<Instruction>& candidate = block->instructions[up_cursor.source_idx];
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bool is_mem = candidate->isVMEM() || candidate->isFlatLike() || candidate->isSMEM();
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if (candidate->opcode == aco_opcode::p_logical_end || is_mem)
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if (!is_reorderable(candidate.get()) || is_mem)
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break;
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/* check if candidate depends on current */
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@@ -1093,7 +1096,7 @@ schedule_LDS(sched_ctx& ctx, Block* block, Instruction* current, int idx)
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for (; found_dependency && k < max_moves && i < window_size; i++) {
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aco_ptr<Instruction>& candidate = block->instructions[up_cursor.source_idx];
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bool is_mem = candidate->isVMEM() || candidate->isFlatLike() || candidate->isSMEM();
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if (candidate->opcode == aco_opcode::p_logical_end || is_mem)
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if (!is_reorderable(candidate.get()) || is_mem)
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break;
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HazardResult haz = perform_hazard_query(&hq, candidate.get(), true);
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@@ -1128,7 +1131,7 @@ schedule_position_export(sched_ctx& ctx, Block* block, Instruction* current, int
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assert(candidate_idx >= 0);
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aco_ptr<Instruction>& candidate = block->instructions[candidate_idx];
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if (candidate->opcode == aco_opcode::p_logical_start)
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if (!is_reorderable(candidate.get()))
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break;
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if (candidate->isVMEM() || candidate->isSMEM() || candidate->isFlatLike())
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break;
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@@ -1171,7 +1174,7 @@ schedule_VMEM_store(sched_ctx& ctx, Block* block, Instruction* current, int idx)
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for (int16_t k = 0; k < VMEM_STORE_CLAUSE_MAX_GRAB_DIST;) {
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aco_ptr<Instruction>& candidate = block->instructions[cursor.source_idx];
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if (candidate->opcode == aco_opcode::p_logical_start)
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if (!is_reorderable(candidate.get()))
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break;
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if (should_form_clause(current, candidate.get())) {
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