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780 Commits

Author SHA1 Message Date
Timothy Arceri 0f2c7341e8 ac/radv: move lower_indirect_derefs() to ac_nir_to_llvm.c 
Until llvm handles indirects better we will need to use these
workarounds in the radeonsi backend also.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-03-05 14:09:23 +11:00
Timothy Arceri f5305c1b44 ac: fix nir_intrinsic_shared_atomic_comp_swap handling 
Following on from 49879f3778 this makes sure we use the correct
src index.

Fixes cts test:
KHR-GL46.compute_shader.atomic-case3

Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-03-02 09:11:20 +11:00
Dave Airlie 49879f3778 ac/nir: fix shared atomic operations. 
The nir->llvm conversion was using the wrong srcs.

Fixes:
tests/spec/arb_compute_shader/execution/shared-atomics.shader_test

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-01 10:06:06 +10:00
Dave Airlie 69495b30a3 ac/nir: don't apply slice rounding on txf_ms 
This matches the tgsi code.

Fixes arb_texture_multisample texelFetch piglit tests.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: f4e499ec79 (radv: add initial non-conformant radv vulkan driver)
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-01 10:04:34 +10:00
Samuel Pitoiset 639c4f2b54 ac/shader: move scanning some info about input PS declarations 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-02-28 10:14:26 +01:00
Dave Airlie c7b25005a1 ac/radv: move load base vertex abi setup to vertex shader. 
This was segfaulting:
dEQP-VK.memory.pipeline_barrier.host_write_index_buffer.1024

Fixes: 8de6f79707 (ac/radeonsi: add load_base_vertex() to the abi)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-28 09:58:12 +10:00
Dave Airlie 3401b028df ac/shader: fix vertex input with components. 
This fixes:
dEQP-VK.glsl.440.linkage.varying.component.*

Fixes: 1c57a6da5e (ac/shader: scan vertex inputs usage mask)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-28 09:04:46 +10:00
Timothy Arceri 08fa84bb9a ac: implement nir_op_ldexp 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-28 09:23:49 +11:00
Timothy Arceri 9790921ff5 ac: fix nir_op_fdd{x,y} handling 
radeonsi, i965 and anv all treat fdd{x,y} opcodes the same as
fdd{x,y}_coarse by default. The SPIR-V spec lets the implementation
decide how it should be handled and radv was previously going
for the higher quality option. Here we change the shared amd
code to match how nir_op_fdd{x,y} is expected to be handled
by the other NIR drivers.

Fixes piglit test:
./bin/arb_shader_texture_lod-texgrad -auto

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-28 09:23:49 +11:00
Timothy Arceri 8de6f79707 ac/radeonsi: add load_base_vertex() to the abi 
Fixes the following piglit tests:

./bin/arb_shader_draw_parameters-basevertex basevertex -auto -fbo
./bin/arb_shader_draw_parameters-basevertex basevertex-baseinstance -auto -fbo

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-28 09:23:49 +11:00
Timothy Arceri 5504bebfc4 ac: add support for handling nir_intrinsic_load_vertex_id 
This will be used by radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-28 09:23:49 +11:00
Timothy Arceri 3a0b4187dd ac: fix f2b and i2b for doubles 
Without this llvm was asserting in debug builds.

V2: use LLVMConstNull()

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-28 09:23:49 +11:00
Samuel Pitoiset a549da877b ac/nir: clean up a hack about rounding 2nd coord component 
It's basically just the opposite, and it only makes sense to
round the layer for 2D texture arrays.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-27 10:09:27 +01:00
Samuel Pitoiset e05507a427 ac/nir: use ordered float comparisons except for not equal 
Original patch from Timothy Arceri, I have just fixed the
not equal case locally.

This fixes one important rendering issue in Wolfenstein 2
(the cutscene transition issue).

RadeonSI uses the same ordered comparisons, so I guess that
what we should do as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104302
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104905
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
 2018-02-26 13:59:04 +01:00
Timothy Arceri 9873bd9dcd ac: make use of ac_get_llvm_num_components() helper 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-26 11:43:47 +11:00
Samuel Pitoiset d6b7539206 ac/nir: remove emission of nir_op_fpow 
fpow is now lowered at NIR level.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-22 20:44:46 +01:00
Samuel Pitoiset a01e9996b5 ac/nir: set GLC=1 for load/store of coherent/volatile images 
This disables persistence accross wavefronts.

F1 2017 and Wolfenstein 2 appear to use some coherent images
but this patch doesn't seem to change anything.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-22 20:39:55 +01:00
Timothy Arceri 6d338d757f ac/radeonsi: pass type to load_tess_varyings() 
We need this to be able to load 64bit varyings.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-22 09:31:00 +11:00
James Zhu f0ad908e79 amd/common:add uvd hevc enc support check in hw query 
Based on amdgpu hardware query information to check if UVD hevc enc support

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-21 13:53:38 -05:00
Samuel Pitoiset a6accad68f ac/nir: add glsl_is_array_image() helper 
For consistency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-21 09:41:51 +01:00
Samuel Pitoiset ff83dfb364 ac/nir: set the DA field when performing atomics on 3D images 
This doesn't fix anything known but it should definitely be set.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-21 09:41:49 +01:00
Dave Airlie 952222ddd4 radv/tess: don't need to look in constant for vertices_per_patch 
This just avoids passing this value via user sgprs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:28 +00:00
Dave Airlie 77fd1b9187 ac/radv: cleanup some tcs output values access 
Just consolidates some code to make it easier to change.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:23 +00:00
Dave Airlie 0e6f0d400b ac/radv: remove total_vertices variable 
This just removes an unneeded variable.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:19 +00:00
Dave Airlie e9b9fb3616 ac/radv: don't mark tess inner as used if we don't use it. 
This just avoids marking it as a used output if we don't
actually use it.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:15 +00:00
Dave Airlie d5b2d7ed67 ac/nir: to integer the args to bcsel. 
dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw
was hitting an llvm assert due to one value being an int and the
other a float.

This just casts both values to integer and fixes the test.

Fixes: dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-20 23:15:18 +00:00
Samuel Pitoiset 1ac741d690 ac/nir: move ac_declare_lds_as_pointer() outside of the switch 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-20 10:44:59 +01:00
Marek Olšák 931ec80eeb radeonsi: implement 32-bit pointers in user data SGPRs (v2) 
User SGPRs changes:
    VS:     14 ->  9
    TCS:    14 -> 10
    TES:    10 ->  6
    GS:      8 ->  4
    GSCOPY:  2 ->  1
    PS:      9 ->  5
    Merged VS-TCS: 24 -> 16
    Merged VS-GS:  18 -> 11
    Merged TES-GS: 18 -> 11

SGPRS: 2170102 -> 2158430 (-0.54 %)
VGPRS: 1645656 -> 1641516 (-0.25 %)
Spilled SGPRs: 9078 -> 8810 (-2.95 %)
Spilled VGPRs: 130 -> 114 (-12.31 %)
Scratch size: 1508 -> 1492 (-1.06 %) dwords per thread
Code Size: 52094872 -> 52692540 (1.15 %) bytes
Max Waves: 371848 -> 372723 (0.24 %)

v2: - the shader cache needs to take address32_hi into account
    - set amdgpu-32bit-address-high-bits

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
 2018-02-17 04:52:17 +01:00
Marek Olšák 0977b7f7b3 ac: query high bits of 32-bit address space 2018-02-17 04:51:58 +01:00
Samuel Pitoiset 579b33c1fd ac/nir: do not reserve user SGPRs for unused descriptor sets 
In theory this might lead to corruption if we bind a descriptor
set which is unused, because LLVM is smart and it can re-use
unused user SGPRs. In practice, this doesn't seem to fix
anything.

As a side effect, this will reduce the number of emitted
SH_REG packets.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-15 14:53:30 +01:00
Samuel Pitoiset 309854148c ac/shader: fix gathering of desc_set_used_mask 
This was quite wrong.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-15 14:53:30 +01:00
Samuel Pitoiset 61a4fc3ecc ac/shader: be a little smarter when scanning vertex buffers 
Although meta shaders don't use any vertex buffers, there is no
behaviour change but I think it's better to do this. Though,
this saves two user SGPRs for push constants inlining or
something else.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-15 14:53:30 +01:00
Timothy Arceri 9740c8a8aa ac: implement nir_intrinsic_image_samples 
Fixes cts test:
KHR-GL45.shader_texture_image_samples_tests.image_functional_test

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-15 09:02:41 +11:00
Timothy Arceri 3ad52501dc ac/nir_to_llvm: fix image size for arrays of arrays 
Fixes cts test:
KHR-GL44.shader_image_size.advanced-changeSize

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-15 09:02:41 +11:00
Samuel Pitoiset ad4b58ea70 ac/nir: rename nir_to_llvm_context to radv_shader_context 
There is still more to do in that area, but it's a good start.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:16 +01:00
Samuel Pitoiset 141db61509 ac: remove nir_to_llvm_context from ac_nir_translate() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:14 +01:00
Samuel Pitoiset a541117ff4 ac/nir: remove nir_to_llvm_context::nir link 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:12 +01:00
Samuel Pitoiset e9f0205ca2 ac: move the outputs array to the ABI 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:10 +01:00
Samuel Pitoiset 07e4268f36 ac/shader: scan force_persample 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:08 +01:00
Bas Nieuwenhuizen 7461bd5b8f ac: Use the renumbered const address space for LLVM 7. 
The LLVM AMDGPU backend decided to renumber the constant address
space ....

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-14 01:05:03 +01:00
Timothy Arceri 10457712ed ac/nir: add nir_intrinsic_{load,store}_shared support 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-13 14:43:05 +11:00
Timothy Arceri c787cbfa33 ac/nir_to_llvm: add support for nir_intrinsic_shared_atomic_* 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-13 14:43:05 +11:00
Eric Anholt 091bff8317 ac/nir: Fix compiler warning about uninitialized dw_addr. 
Even switching the def's condition to be the same chip revision check as
the use, the compiler doesn't figure it out.  Just NULL-init it.

Fixes: ec53e52742 ("ac/nir: Add ES output to LDS for GFX9.")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 20:48:29 +00:00
Samuel Pitoiset f4e85ba93f ac/nir: remove backlink to nir_to_llvm_context 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:39 +01:00
Samuel Pitoiset be5f6eb13e ac/nir: remove nir_to_llvm_context::module 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:36 +01:00
Samuel Pitoiset 90a815ddeb ac/nir: remove nir_to_llvm_context::builder 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:34 +01:00
Samuel Pitoiset 759acfa180 ac/nir: drop nir_to_llvm_context from glsl_to_llvm_type() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:31 +01:00
Samuel Pitoiset e7373a6498 ac/nir: drop nir_to_llvm_context from visit_var_atomic() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:29 +01:00
Samuel Pitoiset 485346b05a ac/nir: drop nir_to_llvm_context from visit_vulkan_resource_reindex() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:27 +01:00
Samuel Pitoiset cd6dfacda9 ac/nir: drop nir_to_llvm_context from visit_load_push_constant() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:25 +01:00