aaa758d3dd
mesa: remove redundant _mesa_prim::is_indexed
...
Instead, check (ib != NULL) like all other drivers.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
0c9850e55d
mesa/i965: remove _mesa_prim::indirect_offset
...
Only i965 was using it.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
f55ae2cdbe
gallium/u_threaded: convert dividing by index_size to a bit shift
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
28d75fc286
gallium/u_threaded: fix uploading user indices with start != 0
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
c9e4dc8d5e
gallium: pass cso_velems_state into cso_context instead of pipe_vertex_element
...
This removes one memcpy from the CSO hashing code.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
6c90e39a5b
gallium/cso_hash: inline struct cso_hash_data
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
505cd5f12b
gallium/cso_hash: pack cso_node better
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
950ee0a370
mesa: remove unused "indirect" parameter from Driver.Draw
...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
9556805ac4
i965: stop using "indirect" parameter from Driver.Draw (non-indirect)
...
The parameter will be removed.
v2: added UNUSED, removed "!!"
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990 >
2020-02-28 00:53:45 +00:00
dab7a4d82c
anv: Remove unused field urb.total_size
...
This was used before the URB calculation functions were shared by GL
and Vulkan. Also drop the substruct for the remaining, `l3_config` is
a good name on its own.
Also-written-by: Jason Ekstrand <jason@jlekstrand.net >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981 >
2020-02-27 14:45:10 -08:00
0bb25e4713
pan/midgard: Use address analysis for globals, etc
...
..instead of opencoding for constants and doing the rest as ALU.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
f5401cb886
pan/midgard: Add address analysis framework
...
Midgard has the ability to calculate addresses as part of the load/store
pipeline. We'd like to make use of this to avoid doing this work on the
ALU pipes. To do so, when emitting globals/SSBOs/shareds, we walk the
tree looking for address arithmetic to try to parse out something the
hardware can work with, letting the original instructions be DCE'd
ideally. This analysis is done at the NIR level to properly account for
some messy details of vectorization which we'd rather not poke at the
backend level. (Originally I wrote this as a MIR pass but I'm fairly
sure it was wrong.)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
658541a745
pan/midgard: Force address alignment
...
I thought we already had this but... maybe not..
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
93ca47e046
pan/midgard: Round up bytemasks when promoting uniforms
...
Fixes crashes with uniform promotion in certain mixed type
circumstances.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
fd888d351f
pan/midgard: Fix load/store argument sizing
...
The swizzles are as-if they were 32-bit regardless of the bitness of the
operation, but the source sizes can and do change depending on the
flags. Account for this in the analysis.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
ee47ce6ac3
pan/midgard: Add LDST_ADDRESS property
...
Many load/store ops (used for globals, SSBOs, shared memory, etc) have
the ability to compute addresses directly. Mark off which ones behave
like this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
1a2bb78840
pan/midgard: Extract nir_ssa_index helper
...
In case we don't have a nir_src.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
4e60dc8f48
pan/midgard: Partially fix 64-bit swizzle alignment
...
When mixing 32/64-bit, we need to align the 32-bit registers to get the
required alignment. This isn't quite enough yet, though, since user
swizzles could bypass and will need to be lowered to 32-bit moves
(outstanding todo).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
9c59f9f379
pan/midgard: Allow fusing inverted sources for inverted ops
...
It doesn't make a difference to the actual algorithm, so let's get rid
of them.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
21c578027f
pan/midgard: Allow inverted inverted ops
...
We'd like to transform `inand.not` back to `iand` and so forth.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
995e437105
panfrost: Increase SSBO/image limit from 4->8
...
Fixes an error compiling some shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978 >
2020-02-27 21:02:35 +00:00
1046d73af1
etnaviv: disable INT_FILTER for ASTC
...
Tested on GC3000: INT_FILTER bit is incompatible with ASTC formats.
Signed-off-by: Jonathan Marek <jonathan@marek.ca >
Reviewed-by: Lucas Stach <l.stach@pengutronix.de >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927 >
2020-02-27 20:31:45 +00:00
811990dc1c
anv: Remove unused field xfb_used from anv_pipeline
...
Since we only use xfb_info for GEN >= 8, make the ifdef cover that
local variable.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973 >
2020-02-27 10:44:11 -08:00
33f38605e9
ci: Include db410c support in the ARM container.
...
I'm working on moving the db410c CI from docker to LAVA, which means we
get to boot a custom kernel. To do that, we need to enable ARCH_QCOM in
the kernel, save the dtb around, and include abootimg in our container so
that we can generate combined kernel/dtb/ramdisk images for fastboot.
LAVA's fastboot support is unable to pack the overlay into an abootimg
image, just a cpio rootfs. We could flash the cpio rootfs after overlay
addition, but that takes 2 minutes to do, and causes wear on the devices.
Instead, we'll bring up the network at boot and use wget to fetch the
overlay. We'll want network support anyway, so that we can transfer the
failure xmls back to the gitlab job's artifacts at some point.
Since the msm GPU and realtek network firmware increase our payload by
3MB, add in firmware compression so that it doesn't waste as much RAM on
devices not using it.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928 >
2020-02-27 09:36:26 -08:00
20659f1894
ci: Shrink the arm64 kernel build a bit.
...
No sense building some of these subsystems for just testing the GPU.
Saves some container rebuild time and kernel contents to move around.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928 >
2020-02-27 09:36:24 -08:00
9ed6c1be6b
ci: Stop disabling ACPI in the LAVA arm64 kernel build.
...
I can't figure out why, but it's necessary to get QCOM_CLK_APCS_MSM8916
for db410c.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928 >
2020-02-27 09:36:22 -08:00
257415863b
ci: Remove LLVM from ARM test drivers.
...
The LLVM libraries were a significant fraction of the entire payload
(55M/250M uncompressed) into the initramfs of the test boards, but
LLVM is only used for the draw module used in select/feedback (which
isn't even tested in CI on ARM yet).
Assume that llvmpipe draw is safe enough for ARM given the coverage on
x86, and disable LLVM for these jobs.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928 >
2020-02-27 09:36:19 -08:00
9c0bbba856
ci: Split out radv build-testing on arm64
...
radv needs libllvm which increases our ramdisk size
significantly. Since this driver is only build tested,
we can split it out into a separate job.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Eric Anholt <eric@anholt.net >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928 >
2020-02-27 09:36:16 -08:00
ebfa899089
gitlab-ci: Skip dEQP-GLES3.functional.shaders.derivate.*
...
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:57 +01:00
17d775ca5d
gitlab-ci: Remove GLES3 test from Panfrost fails list
...
Seems to have been fixed recently.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:52 +01:00
1fa987ae5e
gitlab-ci: Use PAN_MESA_DEBUG=gles3 for Panfrost
...
We can drop now the GLES version overrides now that we have a DEBUG flag
that enables all what is expected from a GLES 3.0 implementation.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:33 +01:00
5491a13be9
panfrost: Add PAN_MESA_DEBUG=gles3 option
...
This enables experimental GLES3.0 support without ES3.1/2 hacks.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:28 +01:00
f5b6dfcb18
panfrost: Expose PIPE_CAP_PRIMITIVE_RESTART
...
It works just fine, we just forgot to expose the CAP.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:23 +01:00
2fea44c636
panfrost: Simplify stack shift calculation
...
I'm not sure why I never saw smaller values, but here you go.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:17 +01:00
40fd1f9da4
panfrost: Reserve an extra page for spilling
...
I'm not sure what this is for, but the blob does it and I'd rather not
poke farther than needed into hardware-internal details.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:11 +01:00
f37cec3275
panfrost: Default to 256 threads for TLS
...
I'm not sure where I got the impression 1024 was the right number. From
kbase:
#define THREAD_MT_DEFAULT 256
(where MT = "max threads" and the threads to allocate for TLS is <= max
threads). Let's cut out memory footprint for spilling by 75% :)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:05 +01:00
f6ca7ea551
panfrost: Fix param getting
...
....Oops....
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:32:00 +01:00
4a10cfab76
panfrost: Don't set shared->unk0
...
This field controls the size of per-thread temporaries (somehow this is
separate from the regular stack for register spilling..), though I'm not
certain on the details. Regardless this value of 0x1e despite being used
in places by the blob seems wrong and is interfering with correct sizing
of the stack.
We don't use non-spilling scratchpad yet, so this is just here to fix
some details of spilling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:31:54 +01:00
febabb0502
panfrost: Update spilling comment framebuffer->shared
...
All of this should apply equally with compute shaders, as far as I know.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:31:48 +01:00
03822a27e6
panfrost: Fix padded_vertex_count generation
...
These two cases were flipped from the notes, leading to underestimates
of the padded vertex count, manifesting as visual corruption (random
geometry messed up). This issue was raised when noticing the corruption
went away when dramaticlaly oversizing max_index on an instanced indexed
draw, and then checking that padded_count >= vertex_count -- which
turned out *not* to be the case on certain inputs, a clear issue. Hence
looking into this routine...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:31:42 +01:00
23c8597172
panfrost: Fix gl_VertexID/InstanceID
...
Fixes a bunch of tests in dEQP-GLES3.functional.instanced.*.
Fixes: 027944c7c8alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:31:37 +01:00
a0b90b45a9
pan/midgard: Don't spill near a branch
...
Fixes
dEQP-GLES2.functional.shaders.indexing.varying_array.vec2_dynamic_loop_write_
static_read with register pressure forced down.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:31:32 +01:00
ed52855680
pan/decode: Dump scratchpad size if present
...
This will help us narrow the size required for thread local storage.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950 >
2020-02-27 16:31:06 +01:00
d385c5840f
panfrost: Implement index buffer cache
...
For index bufer resources (not user index buffers), we're able to cache
results. In practice, the cache works pretty dang well. It's still
important that the min/max computation is efficient (since when the
cache misses it'll run at draw-time and we don't want jank), but this
can eliminate a lot of computations entirely.
We use a custom data structure for caching. Search is O(N) to the size
but sizes are capped so it's effectively O(1). Insertion is O(1) with
automatic oldest eviction, on the assumption that the oldest results are
the least likely to still be useful. We might also experiment with other
heuristics based on actual usage later.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880 >
2020-02-27 10:30:48 +00:00
12db69aa3f
panfrost: Combine get_index_buffer with bound computation
...
These operations are intertwined since there are optimizations that will
want to "double dip". In particular for user index buffers we'd want to
upload simultaneous with index computation. For resources we'd like to
keep resource related code together.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880 >
2020-02-27 10:30:48 +00:00
e272b110bb
radeon/jpeg: fix the jpeg dt_pitch with YUYV format
...
The dt_pitch should be same as NV12 format from decoder views,
and it finally got corrected with gfx9 surface's fixes from MR
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3738
Signed-off-by: Leo Liu <leo.liu@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
2020-02-27 10:01:35 +01:00
5bc71e1bac
st/va: add support YUY2
...
YUY2 is a duplicate of YUYV and is used by gstreamer for 4:2:2.
Acked-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
2020-02-27 10:01:35 +01:00
d2e715e57a
st/va: enable 4:2:2 chroma format
...
Everything is in place to support them.
Acked-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
2020-02-27 10:01:35 +01:00
69aadc4933
radeonsi: fix surf_pitch for subsampled surface
...
gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.
For subsampled formats like uyvy (bpe is 2) this breaks in various places:
- sdma copy
- video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363 )
when the vl_compositor_gfx_render method is used
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
2020-02-27 10:01:31 +01:00
c4197fbcdd
gallium/vl: add 4:2:2 support
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2363
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Leo Liu <leo.liu@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
2020-02-27 10:01:31 +01:00
Marek Olšák