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159423 Commits

Author SHA1 Message Date
Marek Olšák
5acff16ce4 radeonsi: add a separate gfx10_init_gfx_preamble_state function 
and set the registers in an order sorted by the offset.

It's less of a mess now.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
c4d465a514 radeonsi: add helpers to create and clone a sized pm4 state 
to simplify si_init_cs_preamble_state and it will be used in the following
commits

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
c23597970b radeonsi: don't program COMPUTE_MAX_WAVE_ID (GDS register) on gfx6 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
ead53b62c9 radeonsi: optimize no-op primitive restart index changes thanks to index masking 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
ade70712df radeonsi: rename the msaa_sample_locs state to sample locations 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
d0e141ca73 radeonsi: merge si_emit_msaa_sample_locs with si_emit_sample_locations 
Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
b8fef52f0c radeonsi: move PA_SU_SMALL_PRIM_FILTER_CNTL to the preamble when possible 
PA_SU_SMALL_PRIM_FILTER_CNTL is set in the gfx preamble if the sample loc
bug isn't present. Else, it's set as part of sample locs state.

This is part 3 of simplifying si_emit_msaa_sample_locs.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
547fccaab9 radeonsi: adjust 16x EQAA sample locs to make PA_SU_PRIM_FILTER_CNTL immutable 
and move PA_SU_PRIM_FILTER_CNTL to the gfx preamble.

If sample locations don't use the -8 coordinate, the EXCLUSION can always
be set to 1.

This is part 2 of simplifying si_emit_msaa_sample_locs.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
818381dfbd radeonsi: always set sample locations even for 1x MSAA for simplicity 
This is part 1 of simplifying si_emit_msaa_sample_locs.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
f6d861a1c1 radeonsi: move PA_CL_NGG_CNTL emission into rasterizer state 
It's a better place. Edge flags only have effect if polygon mode is
enabled. Changing shaders should no longer roll the context due to line
culling flipping EDGE_FLAG_ENA.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
941e214fe7 radeonsi: reorder and comment tracked registers 
Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
d7802b02c4 radeonsi: split tracked_regs masks into context registers and other registers 
Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
9cf2e47833 radeonsi: increase SDMA gfx9+ limits 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
52f94e2b93 radeonsi: decompress DCC for SDMA if we're really going to use SDMA 
change the order of operations

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
d2e6c4d255 radeonsi: unduplicate si_translate_format_to_hw 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
5f2779f62a radeonsi: completely rewrite how VGT_SHADER_STAGES_EN is set 
Use a state atom with an emit function instead of precomputing up to 256
pm4 states in si_context.

Some register fields are precomputed in si_shader for NGG. Others are set
in si_update_shaders.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
cfc9352c25 radeonsi: remove RADEON_FLAG_MALL_NOALLOC due to no use 
and we'll need to use that bit for something else in the future.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
d3f716bdfc radeonsi: add a gfx11 version of si_decompress_textures, add assertions < GFX11 
si_decompress_textures is renamed to gfx6_decompress_textures.
gfx11_decompress_textures is added.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
dc311f3f61 radeonsi: remove a useless depth texture function call in a fast color clear 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
d692d433f2 radeonsi: use nir_lower_alu_to_scalar correctly 
We should use the filter callback that's also used by st/mesa.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
5066623b79 radeonsi: print shader-db stats with AMD_DEBUG=vs,ps,stats 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
2bf839f0ae radeonsi/gfx11: extend DB_Z_INFO.NUM_SAMPLES programming to > GFX11 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
52ca879cdd radeonsi: export non-zero edgeflags for GS and tess 
because edge flags are always enabled when polygon mode is enabled

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
b72a1883e2 radeonsi: remove gl_BackColor VS outputs on demand if color_two_side is disabled 
We just need to set the ps_inputs_read_or_disabled mask correctly.

The VS outputs_written mask should set BFCn instead of COLn, which is why
this removes the is_varying parameter that forced COLn to be set for BFCn.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
a1d938d318 radeonsi: define si_shader_io_get_unique_index() values as SI_UNIQUE_SLOT_* 
for later use

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
ed8250360f amd: add radeon_info* into ac_llvm_context and radv_nir_compiler_options 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
192b2c7c31 ac/nir/ngg: always use load_initial_edgeflags_amd, choose the value in drivers 
radeonsi will have a more complicated condition here

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
d6e70334ff ac/surface: fix R32G3B32 image format regression for gfx6-8 
This is a different fix from the one reviewed because that one broke gfx9.

Fixes: ea7c89d1f5 - ac/surface: move determing ADDR_FMT_* into a helper function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Rhys Perry
b9c1d74ff4 radv: correctly skip vertex loads with packed formats 
This is supposed to check whether any channels of the element is used, but
skipped_start is always 0 for packed formats.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: a46acdbc3f ("radv: Lower non-dynamic VS inputs in NIR.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9062
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23370>
 2023-06-06 16:59:16 +00:00
Rhys Perry
69e259dcff radv: initialize aco_compiler_options::is_opengl 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Fixes: 8d5cc23c18 ("aco: use gds reg when ordered xfb counter add")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23434>
 2023-06-06 16:09:28 +00:00
Rhys Perry
53383fe8a5 aco: fix ds_sub_gs_reg_rtn validation 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Fixes: 8d5cc23c18 ("aco: use gds reg when ordered xfb counter add")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23434>
 2023-06-06 16:09:28 +00:00
Charmaine Lee
e2927dd5e7 mesa/main: fix distance attenuation calculation in ffvertex 
The dist parameter to calculate_light_attenuation() is the
reciprocal of ||VP|| used in the distance attenuation formula (2.4).
So get its reciprocal first before applying it to the distance attenuation
formula.

This fixes a lighting issue in Knights of the Old Republic.

Fixes: c5b3d488f9 ("mesa/main: make ffvertex output nir")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collaborar.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23404>
 2023-06-06 15:15:55 +00:00
Lionel Landwerlin
049c791a63 intel/fs: fix pull-constant-load prior to gfx7 
In ad9bc1ffb5 ("intel/fs: enable UBO accesses through bindless heap")
we added a new source, we need to fixup the source index for the
generator.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ad9bc1ffb5 ("intel/fs: enable UBO accesses through bindless heap")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23405>
 2023-06-06 14:47:41 +00:00
Lionel Landwerlin
c56dd678e4 intel/stub_gpu: add an option to launch valgrind 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23405>
 2023-06-06 14:47:41 +00:00
Yonggang Luo
61a7eacf3e virgl: Replace the usage of os_get_process_name with util_get_process_name 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21034>
 2023-06-06 13:28:19 +00:00
Yonggang Luo
b3feb48548 virgl: Array cmdline on stack should initialized to 0 
Because strncpy may not append 0 if source string is longer than num(63)
Fixes: b3b82fe8ea ("virgl/vtest: add vtest driver")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21034>
 2023-06-06 13:28:19 +00:00
Yonggang Luo
ae7a30d5db r300: Replace usage of os_get_process_name with util_get_process_name in r300_chipset.c 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21034>
 2023-06-06 13:28:18 +00:00
Samuel Pitoiset
8a22f5c372 radv: initialize the device cache UUID even if on-disk cache is disabled 
Otherwise the pipeline cache UUID isn't initialized as well, and the
RADV meta shaders cache can be corrupted.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9150
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23439>
 2023-06-06 12:47:31 +00:00
Tapani Pälli
e6e320fc79 anv: make Wa_16013994831 to use intel_needs_workaround 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22560>
 2023-06-06 12:06:22 +00:00
Tapani Pälli
58e2947cc9 iris: make Wa_16013994831 to use intel_needs_workaround 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22560>
 2023-06-06 12:06:22 +00:00
Benjamin Lee
7e9b06f1c6 intel: Fix stack overflow in intel_dump_gpu 
Previously, the call to ensure_device_info in the intercepted ioctl
would eventually result in another call to ioctl, recursing until stack
overflow:

 - ioctl (intercepted)
 - ensure_device_info
 - intel_get_device_info_from_fd
 - intel_device_info_i915_get_info_from_fd
 - getparam
 - intel_ioctl
 - ioctl (intercepted)

Signed-off-by: Benjamin Lee <benjamin@computer.surgery>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23418>
 2023-06-06 11:17:06 +00:00
Qiang Yu
bd88c75d4c aco,radv: remove unused gs aco shader info 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23432>
 2023-06-06 10:55:10 +00:00
Yiwei Zhang
75cd115ecf venus: temporarily disable VK_EXT_memory_budget 
This has confused the apps. Back out for now until further investigation
is done.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23452>
 2023-06-06 09:40:14 +00:00
Emma Anholt
0be83bf1c4 anv: Drop unused ALL_GRAPHICS_LIB_FLAGS. 
copy and paste from radv.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22865>
 2023-06-06 09:03:09 +00:00
Emma Anholt
b44d477489 tu: Ignore unused shader stages in pipeline library creation. 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22865>
 2023-06-06 09:03:08 +00:00
Ian Romanick
78dd15d8e8 intel/eu/validate: Add some validation of ADD3 
v2: Remove spurious ALIGN_1 checks. Suggested by Matt.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
 2023-06-06 06:10:53 +00:00
Ian Romanick
1c4c76032b intel/eu/validate: Add Gfx12.5 
This required updating the expected results in a number of test. The
vast majority of these are cases where Gfx12.5 platforms don't allow
mixing F and HF sources.

In all honesty... I just updated the half_float_conversion expected
results until the test passed.

The next commit will add changes specific to Gfx12.5.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
 2023-06-06 06:10:53 +00:00
Ian Romanick
a3cfec0690 intel/eu/validate: Use a single macro define half_float_conversion cases 
This is what other tests do. The next commit will add a third set of
possible results (for Gfx12.5+), and the multiple macro method does not
scale.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
 2023-06-06 06:10:53 +00:00
Ian Romanick
7ef45e661f intel/fs: Add constant propagation for ADD3 
v2: Require that the constant value be representable as either uint16_t
or int16_t. Suggested by Matt.

v3: Remove redundant patterns. Noticed by Matt.

shader-db:

DG2
total instructions in shared programs: 23103767 -> 23103577 (<.01%)
instructions in affected programs: 51822 -> 51632 (-0.37%)
helped: 98 / HURT: 15

total cycles in shared programs: 842347714 -> 842380017 (<.01%)
cycles in affected programs: 1942595 -> 1974898 (1.66%)
helped: 97 / HURT: 32

Nearly all of the affected shaders (around 9,900) are shaders in
Cyberpunk 2077. It's about an even split between vertex and fragment
shaders. The majority of the remaining affected shaders (3,600) are
from Strange Brigade. This was also a nearly even split between
fragment and vertex.

All but two of the lost shaders are SIMD32 fragment shaders in
Cyberpunk 2077. The other two are SIMD32 fragment shaders in Dota2.

fossil-db:

DG2
Instructions in all programs: 196379107 -> 196248608 (-0.1%)
helped: 13467 / HURT: 1210

Cycles in all programs: 13931355281 -> 13929955971 (-0.0%)
helped: 11801 / HURT: 2922

Lost: 90

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
 2023-06-06 06:10:53 +00:00
Ian Romanick
7b34808649 nir/algebraic: Fixup iadd3 related patterns 
There should not be any isub at this point due to lowerings that happened
ages before getting to late algebraic.

shader-db:

DG2
total instructions in shared programs: 23103769 -> 23103767 (<.01%)
instructions in affected programs: 65 -> 63 (-3.08%)
helped: 1 / HURT: 0

total cycles in shared programs: 842348074 -> 842347714 (<.01%)
cycles in affected programs: 28572 -> 28212 (-1.26%)
helped: 3 / HURT: 0

One compute shader in Assassin's Creed Odyssey was affected.

fossil-db:

DG2
Instructions in all programs: 196400668 -> 196400676 (+0.0%)
helped: 8 / HURT: 5

Cycles in all programs: 13931740724 -> 13931758003 (+0.0%)
helped: 8 / HURT: 7

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
 2023-06-06 06:10:53 +00:00