radeonsi: remove gl_BackColor VS outputs on demand if color_two_side is disabled
We just need to set the ps_inputs_read_or_disabled mask correctly. The VS outputs_written mask should set BFCn instead of COLn, which is why this removes the is_varying parameter that forced COLn to be set for BFCn. Reviewed-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
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@@ -84,7 +84,7 @@ unsigned si_shader_io_get_unique_index_patch(unsigned semantic)
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* less than 64, so that a 64-bit bitmask of used inputs or outputs can be
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* calculated.
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*/
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unsigned si_shader_io_get_unique_index(unsigned semantic, bool is_varying)
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unsigned si_shader_io_get_unique_index(unsigned semantic)
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{
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switch (semantic) {
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case VARYING_SLOT_POS:
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@@ -107,16 +107,9 @@ unsigned si_shader_io_get_unique_index(unsigned semantic, bool is_varying)
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case VARYING_SLOT_COL1:
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return SI_UNIQUE_SLOT_COL1;
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case VARYING_SLOT_BFC0:
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/* If it's a varying, COLOR and BCOLOR alias. */
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if (is_varying)
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return SI_UNIQUE_SLOT_COL0;
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else
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return SI_UNIQUE_SLOT_BFC0;
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return SI_UNIQUE_SLOT_BFC0;
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case VARYING_SLOT_BFC1:
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if (is_varying)
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return SI_UNIQUE_SLOT_COL1;
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else
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return SI_UNIQUE_SLOT_BFC1;
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return SI_UNIQUE_SLOT_BFC1;
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case VARYING_SLOT_TEX0:
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case VARYING_SLOT_TEX1:
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case VARYING_SLOT_TEX2:
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@@ -1546,7 +1539,7 @@ static bool si_nir_kill_outputs(nir_shader *nir, const union si_shader_key *key)
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if (nir_slot_is_varying(sem.location) &&
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key->ge.opt.kill_outputs &
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(1ull << si_shader_io_get_unique_index(sem.location, true))) {
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(1ull << si_shader_io_get_unique_index(sem.location))) {
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nir_remove_varying(intr, MESA_SHADER_FRAGMENT);
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progress = true;
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}
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@@ -1637,7 +1630,7 @@ static unsigned si_map_io_driver_location(unsigned semantic)
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semantic == VARYING_SLOT_TESS_LEVEL_OUTER)
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return si_shader_io_get_unique_index_patch(semantic);
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return si_shader_io_get_unique_index(semantic, false);
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return si_shader_io_get_unique_index(semantic);
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}
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static bool si_lower_io_to_mem(struct si_shader *shader, nir_shader *nir,
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@@ -1035,7 +1035,7 @@ bool si_create_shader_variant(struct si_screen *sscreen, struct ac_llvm_compiler
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struct si_shader *shader, struct util_debug_callback *debug);
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void si_shader_destroy(struct si_shader *shader);
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unsigned si_shader_io_get_unique_index_patch(unsigned semantic);
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unsigned si_shader_io_get_unique_index(unsigned semantic, bool is_varying);
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unsigned si_shader_io_get_unique_index(unsigned semantic);
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bool si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader,
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uint64_t scratch_va);
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bool si_can_dump_shader(struct si_screen *sscreen, gl_shader_stage stage,
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@@ -748,14 +748,14 @@ void si_nir_scan_shader(struct si_screen *sscreen, const struct nir_shader *nir,
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info->patch_outputs_written |= 1ull << si_shader_io_get_unique_index_patch(semantic);
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} else if ((semantic <= VARYING_SLOT_VAR31 || semantic >= VARYING_SLOT_VAR0_16BIT) &&
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semantic != VARYING_SLOT_EDGE) {
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info->outputs_written |= 1ull << si_shader_io_get_unique_index(semantic, false);
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info->outputs_written |= 1ull << si_shader_io_get_unique_index(semantic);
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/* Ignore outputs that are not passed from VS to PS. */
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if (semantic != VARYING_SLOT_POS &&
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semantic != VARYING_SLOT_PSIZ &&
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semantic != VARYING_SLOT_CLIP_VERTEX) {
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info->outputs_written_before_ps |= 1ull
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<< si_shader_io_get_unique_index(semantic, true);
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<< si_shader_io_get_unique_index(semantic);
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}
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}
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}
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@@ -813,7 +813,7 @@ void si_nir_scan_shader(struct si_screen *sscreen, const struct nir_shader *nir,
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if ((semantic <= VARYING_SLOT_VAR31 || semantic >= VARYING_SLOT_VAR0_16BIT) &&
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semantic != VARYING_SLOT_PNTC) {
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info->inputs_read |= 1ull << si_shader_io_get_unique_index(semantic, true);
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info->inputs_read |= 1ull << si_shader_io_get_unique_index(semantic);
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}
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}
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@@ -231,7 +231,7 @@ static LLVMValueRef si_nir_load_tcs_varyings(struct ac_shader_abi *abi, LLVMType
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ubyte semantic = info->input[driver_location].semantic;
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/* Load the TCS input from a VGPR. */
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unsigned func_param = ctx->args->ac.tcs_rel_ids.arg_index + 1 +
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si_shader_io_get_unique_index(semantic, false) * 4;
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si_shader_io_get_unique_index(semantic) * 4;
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LLVMValueRef value[4];
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for (unsigned i = component; i < component + num_components; i++) {
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@@ -541,7 +541,7 @@ void si_llvm_ls_build_end(struct si_shader_context *ctx)
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if (shader->key.ge.opt.same_patch_vertices) {
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for (unsigned i = 0; i < info->num_outputs; i++) {
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unsigned semantic = info->output_semantic[i];
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int param = si_shader_io_get_unique_index(semantic, false);
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int param = si_shader_io_get_unique_index(semantic);
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for (unsigned chan = 0; chan < 4; chan++) {
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if (!(info->output_usagemask[i] & (1 << chan)))
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@@ -2125,7 +2125,21 @@ void si_update_ps_inputs_read_or_disabled(struct si_context *sctx)
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(!ps_colormask && !ps_modifies_zs && !ps->info.base.writes_memory);
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}
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sctx->ps_inputs_read_or_disabled = ps_disabled ? 0 : ps->info.inputs_read;
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if (ps_disabled) {
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sctx->ps_inputs_read_or_disabled = 0;
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} else {
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uint64_t inputs_read = ps->info.inputs_read;
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if (sctx->shader.ps.key.ps.part.prolog.color_two_side) {
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if (inputs_read & BITFIELD64_BIT(SI_UNIQUE_SLOT_COL0))
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inputs_read |= BITFIELD64_BIT(SI_UNIQUE_SLOT_BFC0);
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if (inputs_read & BITFIELD64_BIT(SI_UNIQUE_SLOT_COL1))
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inputs_read |= BITFIELD64_BIT(SI_UNIQUE_SLOT_BFC1);
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}
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sctx->ps_inputs_read_or_disabled = inputs_read;
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}
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}
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static void si_get_vs_key_outputs(struct si_context *sctx, struct si_shader_selector *vs,
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@@ -3037,7 +3051,7 @@ static void si_init_shader_selector_async(void *job, void *gdata, int thread_ind
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semantic != VARYING_SLOT_PSIZ &&
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semantic != VARYING_SLOT_CLIP_VERTEX &&
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semantic != VARYING_SLOT_EDGE) {
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id = si_shader_io_get_unique_index(semantic, true);
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id = si_shader_io_get_unique_index(semantic);
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sel->info.outputs_written_before_ps &= ~(1ull << id);
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}
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}
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