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Author SHA1 Message Date
Brian Paul 35a9f1bccf print err msg if unable to open shader file 2008-11-04 16:55:18 -07:00
Brian Paul d3222cb1d4 remove old debug glFlush/Finish calls from demos 2008-11-04 16:55:18 -07:00
Eric Anholt 4be624d693 i965: Clean up stale NDC comment. 2008-11-02 12:30:01 -08:00
Eric Anholt 9fd4c27ae3 i965: Avoid vs header computation for negative rhw on G4X. 
This cuts one MOV out when setting a zero header.
 2008-11-02 12:30:01 -08:00
Eric Anholt 34b1776e8d i965: Merge GM45 into the G4X chipset define. 
The mobile and desktop chipsets are the same, and having them separate is
more typing and more chances to screw up.
 2008-11-02 12:30:00 -08:00
Eric Anholt d758c48761 i965: Fix copy'n'paste issue that made brw->urb.constrained useless. 
Also, add a comment explaining what brw->urb.constrained tries to do.
 2008-11-02 12:30:00 -08:00
Brian Paul bbffed0857 mesa: silence warnings 2008-11-01 16:05:40 -06:00
Brian Paul b625a0a475 mesa: do scope replacement for while/for loops too 
This fixes a function inlining bug involving vars declared inside loop bodies.
 2008-11-01 16:05:40 -06:00
Brian Paul 3d0d803313 mesa: glsl tree print improvements 2008-11-01 16:05:40 -06:00
Brian Paul 1e1ba54a94 mesa: fix assignment / parameter passing of sampler types 2008-11-01 16:05:40 -06:00
Brian Paul 131d42573c mesa: additional debug flags for glsl debug/disassembly 2008-11-01 16:05:40 -06:00
Keith Packard 72c914805b Fix for 58dc8b7: dest regions must not use HorzStride 0 in ExecSize 1 
Quoting section 11.3.10, paragraph 10.2 of the 965PRM:

10.2. 	If ExecSize is 1, dst.HorzStride must not be 0. Note that this is
	relaxed from rule 10.1.2. Also note that this rule for destination
	horizontal stride is different from that for source as stated in
	rule #7.

GM45 gets very angry when rule 10.2 is violated.

Patch 58dc8b7 (i965: support destination horiz strides in align1 access mode)
added support for additional horizontal strides in the ExecSize 1 case, but
failed to notice that mesa occasionally re-purposes a register as a
temporary destination, even though it was constructed as a repeating source
with HorzStride = 0.

While, ideally, we should probably fix the code using these register
specifications, this patch simply rewrites them to use HorzStride 1 as the
pre-58dc8b7 code did.

Signed-off-by: Keith Packard <keithp@keithp.com>
 2008-11-01 14:38:19 -07:00
Brian Paul 06fe728e5b mesa: fix some bugs with precision qualifier parsing 2008-10-31 17:42:26 -06:00
Brian Paul 90711775d7 mesa: do scope replacement for variable initializers too 2008-10-31 17:42:26 -06:00
Brian Paul 89bca902b3 mesa: fix copy/paste error in GLSL error msg 2008-10-31 17:42:25 -06:00
Eric Anholt 69e10084cd intel: pixelzoom doesn't apply to glBitmap, so disable the fallback. 2008-10-31 16:04:50 -07:00
Eric Anholt 018088996a intel: Remove fallback for glDrawPixels(GL_COLOR_INDEX) 
GL_COLOR_INDEX mode is just like other normal formats (that is, not
depth/stencil) and is uploaded fine by TexImage.
 2008-10-31 16:04:50 -07:00
Eric Anholt ed478a5fde intel: Add more fallback debugging for glDrawPixels. 2008-10-31 16:04:50 -07:00
Gary Wong ab3e9c481f i965: implement the missing OPCODE_NOISE1 and OPCODE_NOISE2 instructions. 
(Only in fragment shaders, so far.  Support for NOISE3 and NOISE4 to come.)
 2008-10-31 17:37:26 -04:00
Gary Wong 58dc8b7db5 i965: support destination horiz strides in align1 access mode. 
This is required for scatter writes in destination regions to work.
 2008-10-31 17:34:32 -04:00
Xiang, Haihao 963071ffea mesa: fix a typo in the previous commit 2008-10-31 09:24:27 +08:00
Xiang, Haihao bccc09e6bf mesa: fix an issue in _mesa_PointParameterfv(). 2008-10-30 10:40:51 +08:00
Brian Paul 239ce2240a glx: added PFNGL*PROC typedefs for GLX 1.3 functions 
Since we define GLX_VERSION_1_3 in glx.h, the typedefs in the glxext.h header
were getting skipped.
 2008-10-29 15:49:19 -06:00
Nigel Stewart cd1283f515 glu: fix compilation problem when using Windows gl.h (sf bug 2204589) 2008-10-29 09:23:48 -06:00
Eric Anholt 26c1c04fd0 intel: Fix glDrawPixels with 4d RasterPos. 2008-10-28 22:52:38 -07:00
Eric Anholt 59b2c2adbb i965: Fix check_aperture calls to cover everything needed for the prim at once. 
Previously, since my check_aperture API change, we would check each piece of
state against the batchbuffer individually, but not all the state against the
batchbuffer at once.  In addition to not being terribly useful in assuring
success, it probably also increased CPU load by calling check_aperture many
times per primitive.
 2008-10-28 22:52:38 -07:00
Brian Paul 835a9fef05 mesa: include glslcompiler driver in tarball 2008-10-28 18:27:21 -06:00
Brian Paul 1100866aa1 mesa: fix stand-alone glslcompiler build 2008-10-28 17:03:49 -06:00
Eric Anholt 0cade4de4f intel: Don't keep intel->pClipRects, and instead just calculate it when needed. 
This avoids issues with dereferencing stale cliprects around intel_draw_buffer
time.  Additionally, take advantage of cliprects staying constant for FBOs and
DRI2, and emit cliprects in the batchbuffer instead of having to flush batch
each time they change.
 2008-10-28 13:23:33 -07:00
Gary Wong e92a457ac0 i965: Allocate temporaries contiguously with other regs in fragment shaders. 
This is required for threads to be spawned with correctly sized GRF
register blocks.
 2008-10-28 15:03:14 -04:00
Julien Cristau 98fcdf3f49 configure.ac: Add support for gnu/kfreebsd 
Check for *-gnu instead of linux* to set DEFINES.
Change some freebsd* checks to *freebsd*.
 2008-10-28 11:45:05 -07:00
Eric Anholt bcfba0d91e i965: Fix compiler warning from unused var. 2008-10-27 11:53:06 -07:00
Eric Anholt a74b1e149d i965: Remove dead brw->wrap flag. 2008-10-27 11:53:06 -07:00
Eric Anholt dd17cd600a intel: Use dri_bo_get_tiling to get tiling mode of buffers we get from names. 
Previously, we were trying to pass a name to the GEM GET_TILING_IOCTL,
which needs a handle, and failing.  None of our buffers were tiled yet, but
they will be at some point with DRI2 and UXA.
 2008-10-27 11:53:06 -07:00
Xiang, Haihao 2a877411db intel: GL_FALSE on a BO if it won't be modified when mapping this BO. (thanks Eric). 2008-10-26 06:38:27 +08:00
Xiang, Haihao ec8076264e i965: don't emit state when dri_bufmgr_check_aperture_space fails. 
This ensures there is an unfilled batchbuffer used for emitting states again. Partial fix for #17964.
 2008-10-24 16:05:48 +08:00
Xiang, Haihao f657c81911 intel: fallback for intelEmitCopyBlit. 
Use _mesa_copy_rect instead of BLT operation if dri_bufmgr_check_aperture_space
still fails after flushing batchbuffer. Partial fix for #17964.
 2008-10-24 15:55:32 +08:00
Brian Paul 8c20c913f8 mesa: version 43 of glext.h 2008-10-23 11:23:36 -06:00
Brian Paul 3efd3b1512 mesa: version 21 of glxext.h 2008-10-23 11:21:32 -06:00
Brian Paul ea6ddcbe0e mesa: remove calls to _mesa_adjust_image_for_convolution(), use texImage fields 
The texImage->Width/Height fields will have the post-convolution width/height.
 2008-10-23 10:49:51 -06:00
Brian Paul 95c04cccfe mesa: move convolution image adjustment code for glCopyTexSubImage1/2/3D() 
Do it after initial error checking, after we know the texture's internal format.
 2008-10-22 07:53:26 -06:00
Brian Paul 9dfd54fa83 mesa: some re-org of glCopyTexSubImage1/2/3D() error checking 2008-10-22 07:48:37 -06:00
Brian Paul 22e442544b mesa: in textore.c, only adjust image for convolution if image is a color format 
Makes things consistant with the code in teximage.c.
We only want to apply convolution to color formats (not depth/index formats)
 2008-10-22 07:36:33 -06:00
Kristof Ralovich 0970de3171 glx: updated comment 2008-10-21 08:20:43 -06:00
Xiang, Haihao b4bf9acc32 i915: fix carsh in i830_emit_state. (bug #17766) 2008-10-21 10:30:39 +08:00
Brian Paul 893ea47e44 glxswapcontrol: added -fullscreen option 2008-10-16 14:33:27 -06:00
Brian Paul 9a84d78c18 glxgears: for fullscreen, disable window borders the right way 2008-10-16 14:33:27 -06:00
Roland Scheidegger 73e1193632 fix span issue with really old ddx and non-tcl r100 chips 2008-10-16 16:25:52 +02:00
Brian Paul a7b24ac02f mesa: fix error codes in _mesa_GetObjectParameterivARB(), bug 17861 2008-10-16 08:23:53 -06:00
Kristian Høgsberg 4830809524 Update DRI2 implementation according to new specification. 2008-10-14 23:07:55 -04:00