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Author SHA1 Message Date
Timur Kristóf
dc6ae1855a ac/nir/ngg: Use gfx_level from radeon_info. 
So we don't have to pass it separately.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:46 +00:00
Timur Kristóf
e1be943f10 ac/nir/ngg: Add and use a has_ngg_passthru_no_msg field to ac_gpu_info. 
Instead of using the chip family field.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
a40000b85b ac/nir/ngg: Add and use a has_ngg_fully_culled_bug field to ac_gpu_info. 
Better than applying the workaround ad-hoc based on GFX level.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
cad0d26dbf ac/nir/ngg: Add and use a has_attr_ring field to ac_gpu_info. 
While theoretically all GFX11+ GPUs have an attribute ring, it is
nicer to have this property instead of deciding ad-hoc based on
the GFX level.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
b163ce51b1 ac/nir/ngg: Add and use a has_attr_ring_wait_bug field to ac_gpu_info. 
And apply the attribute ring wait workaround based on the new field.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
e76361d626 ac/nir/ngg: Add radeon_info to NGG lowering options. 
The intention is to have all the HW features affecting
shader compilation in one place, instead of ad-hoc decisions
in the code based on the GFX level and chip class.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
28c501f22c ac/nir/ngg: Slightly refactor emitting vertex parameters. 
No functional changes, just some code cleanup.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
9860fb3780 ac/nir/ngg: Carve out ac_nir_repack_invocations_in_workgroup. 
We're going to want to call it from a different	file too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
d2ff3f9fa0 ac/nir/ngg: Carve out NGG streamout code. 
We're going to want to call it from a different	file too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
1d8f46e00c ac/nir/ngg: Carve out ac_nir_create_output_phis. 
We're going to want to call it from a different	file too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
4bec453595 ac/nir/ngg: Use ac_nir_ngg_alloc_vertices_and_primitives in mesh shader lowering. 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
02dacac869 ac/nir/ngg: Carve out ac_nir_ngg_alloc_vertices_and_primitives. 
We're going to want to call it from a different file too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
a3d8e6a60c ac/nir/ngg: Remove unused vs_output struct. 
Forgot to remove this when I refactored the code to use
ac_nir_prerast_out instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
23641d4032 ac/nir/ngg: Add a few comments explaining some variables. 
These were somewhat confusing, so let's add a few words to
explain what they are exactly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
28f49bf99c ac/nir/ngg: Remove some superfluous variables from culling code. 
No functional changes, just code cleanup.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
e9069eec8a aco: Move NGG pos export scheduling determination to drivers. 
And don't schedule them on GFX11+ at all.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
7a3d95bbe2 ac/nir/ngg: Mitigate attribute ring wait bug when primitive ID is per-primitive. 
There is a possibility that some waves in an NGG workgroup
don't have any input vertices, only primitives. When these
waves store the primitive ID as a per-primitive attribute,
they will need to wait for those stores before the primitive
export, because the other waves can't wait for them.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Timur Kristóf
397d45d055 ac/nir/ngg: Mitigate NGG fully culled bug when GS output is compile-time zero. 
This case is unlikely but possible. We forgot to handle it here,
because it was originally handled by the backend compiler.

On GFX10 chips that have issues with 0 vertices and primitives
exported, this will always export at least 1 vertex and primitive.

This could theoretically fix some hangs on Navi 10, although we are not aware of a specific issue caused by this problem.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
 2025-01-30 15:26:45 +00:00
Erico Nunes
18fb397249 ci/lima: update piglit ci expectations 
Some regressions during lima lab downtime.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33299>
 2025-01-30 14:22:09 +00:00
Tapani Pälli
cb71030387 mesa: enable GL_EXT_conservative_depth extension 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33065>
 2025-01-30 10:50:37 +00:00
Valentine Burley
b3e4a113b2 freedreno/ci: Document flakes 
Some of these cause pipelines to fail.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33298>
 2025-01-30 10:25:05 +00:00
Valentine Burley
06ab1c81d1 amd/ci: Increase amd-raven-skqp parallelism 
This job was taking too long and there's more DUTs in available in LAVA.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33298>
 2025-01-30 10:25:05 +00:00
Valentine Burley
676d4f83d4 virgl/ci: Skip flaky trace 
This flake doesn't render at times and can fail merge pipelines.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33298>
 2025-01-30 10:25:05 +00:00
Mike Blumenkrantz
d8b7fbd4ac ci: mark radv-raven-traces-restricted with allow_failure 
restricted trace jobs are allowed to fail

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33244>
 2025-01-30 09:49:11 +00:00
Samuel Pitoiset
d6f9c19755 radv/amdgpu: add support for AMDGPU_GEM_CREATE_GFX12_DCC 
This flags will be used to set PTE.DCC to VRAM allocations
(ie. compression).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284>
 2025-01-30 08:18:22 +00:00
Samuel Pitoiset
5ac72c5f56 ac/descriptors: allow to configure DCC for buffer descriptors 
This is not used yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284>
 2025-01-30 08:18:22 +00:00
Samuel Pitoiset
fe6494559d ac,radeonsi: add SDMA DCC tiling for GFX12+ 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284>
 2025-01-30 08:18:22 +00:00
Timothy Arceri
e639cd768d glsl: fix return value for subgroupBallot() 
The original code attempted to create a second instance of the intrinsic
with only a different return value which isn't possible since the params
(in this case 0 params) are the same. To fix this were need to create
two differently named intrinsics.

Reviewed-by: Qiang Yu <yuq825@gmail.com>

Fixes: a496d84ac8 ("glsl: add KHR_shader_subgroup_ballot builtin functions")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12510
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33231>
 2025-01-30 06:06:32 +00:00
Caio Oliveira
f18dee3618 intel/brw: Fallback to SEND from SEND_GATHER if possible 
After optimization happen, if the sources are still in one or two
contigous spans for some reason (e.g. some data read from memory
now being written), it is beneficial to just use regular SEND
and avoid having to set the ARF scalar instruction.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410>
 2025-01-30 04:43:58 +00:00
Caio Oliveira
b6b32933ad intel/brw: Use SHADER_OPCODE_SEND_GATHER in Xe3 
Add an optimization pass to turn regular SENDs into SEND_GATHERs.
This allows the payload to be "broken" into smaller pieces that
can be further optimized, which _may_ result in

- less register pressure (no need to contiguous space), and
- less instructions (no need to MOV to such space).

For debugging, the INTEL_DEBUG=no-send-gather option skips this
optimization, and reporting how many opportunities were missed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410>
 2025-01-30 04:43:58 +00:00
Caio Oliveira
26d4d04d63 intel/brw: Add lowering for SHADER_OPCODE_SEND_GATHER 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410>
 2025-01-30 04:43:58 +00:00
Caio Oliveira
650ec7169d intel/brw: Add SHADER_OPCODE_SEND_GATHER 
Starting in Xe3, there's a variant of SEND that take the
register numbers from the ARF scalar register, and don't
require them to be contiguous.  The new opcode added here
represents that kind of SEND.

To make the original sources still reachable, we keep them
around during the IR, just ignoring them at generator time.
This allow software scoreboard to properly reason the
dependencies without trying to decode the contents of ARF
scalar register being used.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410>
 2025-01-30 04:43:58 +00:00
Caio Oliveira
2fca22347c intel/brw: Plumb through generator whether SEND is gather variant 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410>
 2025-01-30 04:43:58 +00:00
Caio Oliveira
00fac79f99 intel/brw: Add scoreboard support for scalar register 
Xe3 adds a new pipe that handles *only* MOVs from immediate into the
scalar register.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410>
 2025-01-30 04:43:57 +00:00
Daniel Schürmann
3868102a04 nir/loop_analyze: stack-allocate loop_info_state 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:36 +00:00
Daniel Schürmann
fbaabcfb0a nir/loop_analyze: store nir_loop_induction_variable hash table in loop_info 
No need to create a separate array.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:36 +00:00
Daniel Schürmann
f327ece9bf nir/loop_analyze: re-use the same nir_loop_variable struct before and after the increment 
The information is redundant.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:36 +00:00
Daniel Schürmann
de30bfd5b8 nir/loop_analyze: ignore terminating induction variable in guess_loop_limit() 
The array access might be using a different induction variable.

Totals from 23 (0.03% of 79395) affected shaders: (Navi31)
Instrs: 113742 -> 121017 (+6.40%)
CodeSize: 592152 -> 636228 (+7.44%)
Latency: 439244 -> 426784 (-2.84%)
InvThroughput: 36264 -> 35199 (-2.94%)
SClause: 3048 -> 3426 (+12.40%)
Copies: 10630 -> 10733 (+0.97%)
Branches: 3774 -> 4310 (+14.20%)
PreSGPRs: 1683 -> 1696 (+0.77%)
PreVGPRs: 1230 -> 1232 (+0.16%)
VALU: 51026 -> 55912 (+9.58%)
SALU: 15270 -> 15638 (+2.41%)
SMEM: 4456 -> 5149 (+15.55%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:36 +00:00
Daniel Schürmann
7eb2e96d16 nir/loop_analyze: insert only induction vars into hash map 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
f0fd04327f nir/loop_analyze: replace nir_loop_variable array with hash table 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
642a980c9e nir/loop_analyze: don't initialize nir_loop_variable separately 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
f11edceae3 nir/loop_analyze: directly record induction variables into nir_loop_info 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
e639c4d74f nir/loop_analyze: remove nir_loop_variable::in_loop 
This information is redundant.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
7f244ced10 nir/loop_analyze: remove nir_loop_variable::in_if_branch and nir_loop_variable::in_nested_loop 
This information is redundant.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
83f395a7ce nir/loop_analyze: only iterate loop header phis in compute_induction_information() 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
65f95ae74e aco/insert_NOPs: implement VALU -> VALU case for VALUReadSGPRHazard on GFX12 
Totals from 36918 (46.50% of 79395) affected shaders: (GFX1200)

Instrs: 34997889 -> 35296429 (+0.85%); split: -0.00%, +0.85%
CodeSize: 186161112 -> 187334364 (+0.63%); split: -0.00%, +0.63%
Latency: 250265551 -> 250330784 (+0.03%); split: -0.00%, +0.03%
InvThroughput: 41185298 -> 41192503 (+0.02%); split: -0.00%, +0.02%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32682>
 2025-01-30 03:13:16 +00:00
Daniel Schürmann
6c7355f0e6 aco/insert_NOPs: refactor VALUReadSGPRHazard detection 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32682>
 2025-01-30 03:13:16 +00:00
Mike Blumenkrantz
4b0f2d1a2b zink: refcount needs_present resource 
it's theoretically possible that this resource could be destroyed
between flush_resource and flush...maybe

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33285>
 2025-01-30 01:38:32 +00:00
Mike Blumenkrantz
c1e09c7309 zink: add zink_resource_reference() util function 
same as pipe version but using different types

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33285>
 2025-01-30 01:38:32 +00:00
Mike Blumenkrantz
2d630952b0 zink: check for bound gfx stages before dereferencing 
this avoids a null deref in a pattern like bind TES->unbind TES
with the same descriptor bound

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33285>
 2025-01-30 01:38:32 +00:00