AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
201,327 Commits 1 Branch 0 Tags
09b5de379cd47a025662459d03aed970da170676
Commit Graph

186467 Commits

Author SHA1 Message Date
Lionel Landwerlin
4434b0799b anv: dirty pipeline & push constants after internal CS shaders 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7ca5c84804 ("anv: add support for simple internal compute shaders")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33280>
 2025-01-29 15:25:43 +00:00
Alyssa Rosenzweig
d58ece8d83 nir/serialize: strip function names names 
this makes stripped nir smaller.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33273>
 2025-01-29 14:37:41 +00:00
Samuel Pitoiset
4425d8556f radv: use stage instead of entrypoint to determine valid gfx stages 
Otherwise if the function name is stripped during NIR serialization,
importing libraries would break because entrypoint is NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33273>
 2025-01-29 14:37:41 +00:00
Lionel Landwerlin
524dab2b10 anv: expose A4B4G4R4_UNORM_PACK16 support with CBCWF is disabled 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12511
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33194>
 2025-01-29 13:57:26 +00:00
Lionel Landwerlin
7fab8675a6 anv: add a drirc to disable border colors without format 
Disable it by default on Android.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33194>
 2025-01-29 13:57:26 +00:00
Lionel Landwerlin
c2c3f19e88 anv: pass physical device to format helpers 
So that we can have special behavior based on drirc configuration.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33194>
 2025-01-29 13:57:26 +00:00
Lionel Landwerlin
eb0c2d8f33 anv: use flags for format capabilities 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33194>
 2025-01-29 13:57:26 +00:00
Valentine Burley
1dce02fa41 anv/ci: Revert to 6.6 kernel on anv-jsl 
The 6.11 kernel we were using frequently caused panics and hangs,
particularly in full nightly jobs, making it unreliable.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33279>
 2025-01-29 12:39:41 +00:00
Tapani Pälli
66aebfb1eb isl: use workaround framework for Wa_1207137018 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33236>
 2025-01-29 12:10:13 +00:00
Tapani Pälli
405274fda4 intel/dev: update mesa_defs.json from internal database 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33236>
 2025-01-29 12:10:13 +00:00
Caio Oliveira
080c136afb intel/executor: Fix typo when copying result into Lua table 
Fixes: e72bf2d02f ("intel: Add executor tool")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33277>
 2025-01-29 09:57:23 +00:00
Faith Ekstrand
66076ca7e8 nvk: Handle pCounterBuffers == NULL in Begin/EndTransformFeedback 
Fixes: 5fd7df4aa2 ("nvk: Support for vertex shader transform feedback")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33276>
 2025-01-29 09:35:18 +00:00
Faith Ekstrand
e00eeb2098 nak: Use ldc.constant for load_global when CAN_REORDER is set 
This yields a 15-20x performance improvement in Dragon Age: The
Veilguard running under VKD3D-Proton.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33276>
 2025-01-29 09:35:18 +00:00
Faith Ekstrand
f7e524026f nvk: Call nir_opt_access 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33276>
 2025-01-29 09:35:18 +00:00
Samuel Pitoiset
66775c89fc radeonsi: fix programming DCC for SDMA on GFX12 
Fixes: 3d05d86d88 ("radeonsi/gfx12: add DCC")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33259>
 2025-01-29 08:51:57 +00:00
Samuel Pitoiset
e77a409b26 radv/ci: add expected list of failures for GFX1200 
Same as NAVI31.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33258>
 2025-01-29 08:31:10 +00:00
Iván Briano
9e5a3a356e hasvk: disable logic op for float/srgb formats 
Fixes new tests: dEQP-VK.pipeline.*.logic_op_na_formats.*

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33250>
 2025-01-29 08:02:21 +00:00
Iván Briano
c3dea47be8 anv: disable logic op for float/srgb formats 
Fixes new tests: dEQP-VK.pipeline.*.logic_op_na_formats.*

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33250>
 2025-01-29 08:02:21 +00:00
Marek Olšák
d0e1c508c6 ac/fake_hw_db: deobfuscate GPU name strings 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:20:02 +00:00
Marek Olšák
64d2d10ad8 winsys/amdgpu: disable DCC for gfx12 when using AMD_FORCE_FAMILY 
otherwise buffer allocation fails

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:20:01 +00:00
Marek Olšák
43588be435 radeonsi: remove an incorrectly defined modifier 
It's missing the PACKERS field to distinguish between different layouts
and it's a useless swizzle mode anyway.

Fixes: 0833dd7d12 - amd/common: Add support for modifiers.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9344

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:20:01 +00:00
Marek Olšák
665058237d radeonsi: remove redundant divergence analysis and smem flagging 
They are called above this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:20:00 +00:00
Marek Olšák
5f84ff1125 radeonsi: dead code removal and move some code out of headers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:20:00 +00:00
Marek Olšák
3483e1f274 radeonsi: remove SI_TRACKED__UNUSED_GAP 
we need to move ALPHA_REF so as not to fail static assertions
in the previous commit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:59 +00:00
Marek Olšák
19907a24ec radeonsi: validate BITSET_TEST_RANGE_INSIDE_WORD assertion at compile time 
This will prevent accidental crashes and hangs because of how we define
tracked enums.

The reg_enum parameter must be a compile-time constant.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:59 +00:00
Marek Olšák
e0d715c626 radeonsi: set gl_FragCoord to pixel center to fix GLCTS failures 
SPI_BARYC_CNTL is moved to the preamble because it's always 0.

We set frag_coord_is_center for the NIR pass to indicate that sample_pos
should be lowered differently.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:58 +00:00
Marek Olšák
9fdd8225c1 radeonsi/ci: add more gfx11 flakes 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:58 +00:00
Marek Olšák
3424cdadf5 radeonsi: fix interpolateAt* with non-GL4 ARB_sample_shading 
There is no test for this, but it's been broken.

ARB_sample_shading doesn't set fs.uses_sample_shading in shader_info,
which causes us to enter this path to force per-sample interpolation,
but doing so breaks the shader if the PS prolog is used.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:57 +00:00
Marek Olšák
65398d571b radeonsi: ignore pipe_rasterizer_state::force_persample_interp 
It just indicates that sample shading is enabled, which we were
checking already. The state is redundant.

Just check shader_info::fs::uses_sample_shading. ARB_sample_shading (GL3.3)
doesn't set fs.uses_sample_shading in shader_info (which is for GL4.0), and
that's why we have this codepath that forces per-sample interpolation.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:57 +00:00
Marek Olšák
1ff790a4f8 radeonsi: implement replacement of sample_mask_in with helper_invocation 
This just implements it in the PS prolog and LLVM IR (ACO already
implements it), and enables it for monolithic shaders where it's already
implemented in ac_nir_lower_ps_early.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:57 +00:00
Marek Olšák
71e95b373b radeonsi: remove si_shader_info code that is no longer needed 
A lot of this info is now derived from shader variant NIR.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:56 +00:00
Marek Olšák
871c619ad4 radeonsi: don't set BASE in si_nir_lower_ps_color_input 
Bases are recomputed later, so these values have no effect here.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:56 +00:00
Marek Olšák
e5ee15a42e radeonsi: gather PS inputs from shader variant NIR 
This further reduces dependence on si_shader_info.

union si_ps_input_info is added because we don't need usage_mask in there.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:55 +00:00
Marek Olšák
0eaff1ace8 radeonsi: set SHARED_VGPR_CNT for gfx shaders for ACO 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:55 +00:00
Marek Olšák
cbac2e4c75 radeonsi: set SHARED_VGPR_CNT for compute for ACO 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:54 +00:00
Marek Olšák
a962979baa radeonsi: precompute COMPUTE_PGM_RSRC3 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:54 +00:00
Marek Olšák
d1d6e6695e radeonsi: remove ac_shader_config from si_shader_part 
we only need num_sgprs and num_vgprs from it

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:53 +00:00
Marek Olšák
988aca159c radeonsi: verify that SPI_PS_INPUT_ENA from LLVM is equal to ACO 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:53 +00:00
Marek Olšák
c61ee0e8fa radeonsi: minor restructuring of si_llvm_compile_shader 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:52 +00:00
Marek Olšák
1c4c883a3b radeonsi: get SPI_PS_INPUT_ENA from shader variant NIR for ACO 
All PS lowering that changes, adds, or removes system values based on
the shader key is done first, which is done in ac_nir_lower_ps_early and
other passes, so now we just need to gather them.

This should improve performance for ACO due to fewer VGPRs needed
for optimized shader variants of PS.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:52 +00:00
Marek Olšák
edeb52ce4a radeonsi: split si_fixup_spi_ps_input_config 
Extract prolog code into si_set_spi_ps_input_config_for_separate_prolog.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:51 +00:00
Marek Olšák
e58efc072b radeonsi: move spi_ps_input_config functions up 
they will be needed here

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:51 +00:00
Marek Olšák
d3a0da555f radeonsi: lower indirect indexing sooner 
We need to do this before we gather shader_info because lowering indirect
indexing can trigger more code elimination.

The opts_not_run parameter is removed because it was only needed for array
temps.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:50 +00:00
Marek Olšák
98e46a7e9b radeonsi: use barycentrics from load_point_coord_maybe_flipped 
The pass is called sooner because we want to optimize the point_coord
barycentrics in ac_nir_lower_ps_early.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:50 +00:00
Marek Olšák
9e3033e071 radeonsi: move/rewrite PS color input gathering for shader variants 
This removes duplicated gathering from 3 places for shader variants,
and adds it where it should be, which is before late optimizations and
late lowering passes, which is where we want it for the radeonsi linker.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:49 +00:00
Marek Olšák
1a2f6cad57 radeonsi: set uses_vmem_load/sampler in get_nir_shaders 
It will be done in a different place later, but for now, we need to get
it out of si_update_shader_binary_info because the function will be
removed and PS input gathering will be moved, which will be quite
complicated, but it's needed for having a linker in radeonsi.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:49 +00:00
Marek Olšák
a9e210184b radeonsi: get LS+HS and ES+GS together in get_nir_shader instead of separately 
This is a prerequisite for linking merged shaders.

At the beginning of get_nir_shader (renamed to get_nir_shaders), we get
both shaders that are going to be merged, and then we optimize them together
and pass them to LLVM or ACO-specific code as struct si_linked_shaders.

The code setting uses_instance_id is moved because the previous place
doesn't work with this new organization.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:48 +00:00
Marek Olšák
b6f13a0397 radeonsi: split and restructure get_nir_shader 
This splits shader variant compilation into the following stages:
* get_input_nir
* run_pre_link_optimization_passes
(not implemented yet: run linking optimizations here)
(not implemented yet: gather shader_info here)
* run_late_optimization_and_lowering_passes

This order is important when we start adding linking optimizations for
shader variants and start getting shader_info from shader variants instead
of input NIR.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:48 +00:00
Marek Olšák
0dfcf5f2f8 radeonsi: reorder NIR passes in get_nir_shader (part 3) 
Put passes that optimize the code first, and passes that lower it later.
This will be needed later.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:47 +00:00
Marek Olšák
9f19ad33fa radeonsi: reorder NIR passes in get_nir_shader (part 2) 
This will be needed later.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:47 +00:00