ac/nir/ngg: Add radeon_info to NGG lowering options.

The intention is to have all the HW features affecting
shader compilation in one place, instead of ad-hoc decisions
in the code based on the GFX level and chip class.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>

src/amd/common/nir/ac_nir.h

@@ -144,6 +144,7 @@ ac_nir_lower_indirect_derefs(nir_shader *shader,
 typedef struct {
    enum radeon_family family;
    enum amd_gfx_level gfx_level;
+   const struct radeon_info *hw_info;
 
    unsigned max_workgroup_size;
    unsigned wave_size;

src/amd/vulkan/radv_shader.c

@@ -762,6 +762,7 @@ radv_lower_ngg(struct radv_device *device, struct radv_shader_stage *ngg_stage,
    ac_nir_lower_ngg_options options = {0};
    options.family = pdev->info.family;
    options.gfx_level = pdev->info.gfx_level;
+   options.hw_info = &pdev->info;
    options.max_workgroup_size = info->workgroup_size;
    options.wave_size = info->wave_size;
    options.clip_cull_dist_mask = info->outinfo.clip_dist_mask | info->outinfo.cull_dist_mask;

src/gallium/drivers/radeonsi/si_shader.c

@@ -1817,6 +1817,7 @@ static void si_lower_ngg(struct si_shader *shader, nir_shader *nir)
    ac_nir_lower_ngg_options options = {
       .family = sel->screen->info.family,
       .gfx_level = sel->screen->info.gfx_level,
+      .hw_info = &sel->screen->info,
       .max_workgroup_size = si_get_max_workgroup_size(shader),
       .wave_size = shader->wave_size,
       .can_cull = si_shader_culling_enabled(shader),