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Author SHA1 Message Date
Rob Clark fb6dccc64c freedreno: flip template param order 
Prep for next patch.  We need the per-gen CHIP template param to be
last.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:11:44 +00:00
Rob Clark b2349354e3 freedreno/a6xx: Use with_crb() helper 
Small cleanup that was missed when introducing the helper.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:11:44 +00:00
Rob Clark 392293ce48 freedreno/a6xx: Move VFD_RENDER_MODE emit 
The other two regs with RENDER_MODE fields are already part of
set_bin_size().

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:11:43 +00:00
Rob Clark 9e0942d4d9 freedreno/registers: Move FLAGS_REGID 
This field is only in SP_GS_OUTPUT_CNTL, and not the other regs that
re-use the same bitset.  So move it there.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:11:43 +00:00
Rob Clark 6233b5d841 freedreno/registers: Event cleanups 
Cleanup variants ranges, and in a couple cases rename events to match
docs.  In some cases events are marked valid thru A5XX, simply to
indicate that they were removed at some unknown point before A6XX.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:11:42 +00:00
Rob Clark eeaf438911 freedreno/registers: Convert events to hex 
To match internal docs.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:11:40 +00:00
Rob Clark 74e77ce6a4 freedreno/crashdec: Log IBs to snapshot 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:11:39 +00:00
Rob Clark 8c372e8617 freedreno/crashdec: Dump cmdstream at end 
With gen8 we need to decode more sections before we have enough CP reg
vals to decode cmdstream.  So simplify things by just moving it to the
end.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:11:39 +00:00
Danylo Piliaiev 40b21f115d tu: Add custom resolve tracepoints 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
 2025-12-08 20:44:47 +00:00
Connor Abbott 520e3f3a47 tu: Implement VK_EXT_custom_resolve 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
 2025-12-08 20:44:46 +00:00
Connor Abbott ad84ae2719 tu: Implement VK_QCOM_subpass_shader_resolve 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
 2025-12-08 20:44:46 +00:00
Connor Abbott 7691f1b70d ir3: Support addr0 align of 8 
At this point it isn't actually an alignment, but we need to multiply by
8 now because there are 2 vec4's per view for FDM driver params.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
 2025-12-08 20:44:45 +00:00
Connor Abbott bd821b9a17 nir, tu: Add and use load_frag_coord_gmem_ir3 
We used load_frag_coord_unscaled_ir3 for loading the fragment coord for
input attachments in GMEM, where the normal scaling for gl_FragCoord
shouldn't be used. However with custom resolve a different scaling will
apply to attachments in GMEM. Separate "unscaled" from "gmem" and rename
the NIR options, in preparation for this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
 2025-12-08 20:44:45 +00:00
Connor Abbott cd1e784148 tu: Fix FragCoord offset when HW viewport offset is enabled 
FragCoord seems to have the offset applied to it, so we don't need to
subtract it out. Fixes upcoming test
dEQP-VK.renderpasses.dynamic_rendering.primary_cmd_buff.custom_resolve.monolithic.fdm_nonsubsampled_multiview_with_offset.

Fixes: b34b089ca1 ("tu: Use GRAS bin offset registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
 2025-12-08 20:44:45 +00:00
Connor Abbott b2c685af42 tu: Fix GRAS_BIN_FOVEAT* programming with more than 1 layer 
Similar to when patching load/store coordinates, we have to convert the
layer to the view, splatting view 0 to all layers when there is more
than 1 layer and FDM-per-layer is not enabled.

Fixes upcoming new test
dEQP-VK.renderpasses.*.custom_resolve.*.fdm_nonsubsampled_multilayer_with_offset.

Fixes: b34b089ca1 ("tu: Use GRAS bin offset registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
 2025-12-08 20:44:45 +00:00
Calder Young ee42a48984 anv: Fix scratch pool buffer allocation sizes 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38840>
 2025-12-08 20:09:57 +00:00
Yiwei Zhang 2de8981351 nir: suppress clang warnings for cooperative matrix lowering 
This suppresses below compile warnings:
- warning: variable 'idx' is used uninitialized whenever 'if' condition
  is false [-Wsometimes-uninitialized]

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38835>
 2025-12-08 19:36:05 +00:00
Natalie Vock 6d799ac283 aco: Add pass for spilling call-related registers 
This is a post-RA pass that tracks registers that are preserved by the
ABI, but clobbered by shader code. The pass inserts scratch spills and
reloads in appropriate locations to ensure the register values at the
end of the shader are the same as they were at the start.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:55 +00:00
Natalie Vock 93a5919cee aco/util: Add aco::unordered_set 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:55 +00:00
Natalie Vock 0cfabe0613 aco/lower_to_hw_instr: Add scratch size in call lowering 
We did this in the preserved spiller previously, but let's move it here.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:55 +00:00
Natalie Vock 7059068b61 aco/spill: Restore registers spilled by call immediately 
Makes for better latency hiding if we're not short on registers
otherwise.

On top of RT function calls:
Totals from 7 (0.01% of 81072) affected shaders:

Instrs: 9084 -> 8980 (-1.14%)
CodeSize: 52564 -> 51976 (-1.12%)
SpillSGPRs: 244 -> 248 (+1.64%); split: -3.28%, +4.92%
SpillVGPRs: 360 -> 367 (+1.94%)
Latency: 138989 -> 135669 (-2.39%); split: -2.49%, +0.10%
InvThroughput: 35120 -> 35301 (+0.52%); split: -0.06%, +0.57%
VClause: 258 -> 241 (-6.59%)
SClause: 116 -> 117 (+0.86%)
Copies: 1290 -> 1311 (+1.63%)
Branches: 131 -> 119 (-9.16%)
VALU: 6125 -> 6143 (+0.29%); split: -0.20%, +0.49%
SALU: 920 -> 913 (-0.76%); split: -0.98%, +0.22%
VMEM: 1026 -> 989 (-3.61%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:55 +00:00
Natalie Vock 6616f25e43 aco/spill: Create linear VGPRs for spilling ABI-preserved SGPRs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:55 +00:00
Natalie Vock 6b2e766617 aco/ra: Handle linear VGPRs allocated by p_startpgm 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:54 +00:00
Natalie Vock 761efe9163 aco/spill: Reset scratch_rsrc on calls 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:54 +00:00
Natalie Vock 369a3c0dca aco/spill: Handle calls 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:54 +00:00
Natalie Vock ecc548cd37 aco: Record required call spills during live-var analysis 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:53 +00:00
Natalie Vock 8bc5fdef53 aco: Remove unused p_reload_preserved def 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:52 +00:00
Natalie Vock 8b7ad622ee aco/live_var_analysis: Count linear VGPRs as always preserved by calls 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37907>
 2025-12-08 18:50:31 +00:00
Natalie Vock f692ac76ca radv/rt: Use traversal vars for object origin/direction in ahit/isec 
We already did the work of transforming the ray data, no need to do it
multiple times.

Should theoretically be a lot better. However, none of the fossils
appear to use object-space ray data in anyhit/intersection shaders. :(

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38809>
 2025-12-08 18:29:49 +00:00
Natalie Vock a488203e85 radv/rt: Refactor and split radv_nir_rt_shader.c 
This splits up radv_nir_rt_shader.c into several parts.
The first part is all ray traversal lowering for RT pipelines, located
at radv_nir_rt_traversal_shader.c. It implements building the traversal
loop, including inlined any-hit/intersection shaders (optionally as a
completely separate shader).

The second part is lowering for individual RT stages (right now,
monolithic vs. CPS-style separate compilation). Each lowering technique
lives in its own file (radv_nir_rt_stage_{monolithic,cps}.c).

Code shared between RT lowering techniques (shader inlining helpers and
storage lowering passes) gets moved into radv_nir_rt_stage_common.c.

One header, radv_nir_rt_stage.h, is the public interface for RT pipeline
stage lowering. Functions exposed to users (really just
radv_pipeline_rt.c) go there. The header for internal shared helpers is
radv_nir_rt_stage_common.c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38809>
 2025-12-08 18:29:49 +00:00
Ashley Smith 5681fabdc2 panfrost,panvk: Enable shader_realtime_clock on panthor 1.6 
shader_realtime_clock requires a newer kernel version in order to enable
GLB_COUNTER_EN this change adds a check on this kernel functionality.

Remove GL_EXT_shader_realtime_clock from extensions as this now depends
on kernel version.

Fixes: e9c2c324 ("panvk: enable VK_KHR_shader_clock")
Signed-off-by: Ashley Smith <ashley.smith@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37915>
 2025-12-08 17:58:52 +00:00
Jesse Natalie 7130127e2a dzn: Suppress new MSVC warning by upconverting to uint64_t 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38838>
 2025-12-08 17:28:36 +00:00
Jesse Natalie 55e833ae96 mesa: Cast bitmasks to 64-bit before negating 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38838>
 2025-12-08 17:28:36 +00:00
Jesse Natalie 71dfcd3c96 zink: Fix 64-bit bitmask usage 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38838>
 2025-12-08 17:28:36 +00:00
Jesse Natalie dacc56ee53 u_threaded_context: Use 64-bit bitmask utils 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38838>
 2025-12-08 17:28:36 +00:00
Valentine Burley d966fde4f4 ci: Drop hardware-job prerequisite check jobs 
Stop requiring the `rustfmt` and `yaml-toml-shell-py-test` jobs before
starting hardware jobs.
These prerequisites don't save meaningful resources, as the hardware jobs
are well-behaved nowadays, but they do create unnecessary friction for
users.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14409
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38786>
 2025-12-08 16:59:45 +00:00
Janne Grunau f912db3f8d util/driconf/asahi: Override GL renderer for web browsers 
Several web sites block clients with "Apple" in the WebGL renderer
string if the reported OS is not one of Apple's.
This check seems to implemented via a 3rd party product which is slowly
rolled out over more web sites. Instead of playing whack-a-mole with
web sites in multiple browsers override the OpenGL renderer in mesa for
known browsers.

Backport-to: 25.3
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38845>
 2025-12-08 16:23:54 +00:00
Patrick Lerda 6246b7be10 r600: improve cayman scissor 1x1 workaround 
This change improves evergreen_apply_scissor_bug_workaround().
It provides a fully functional workaround for cayman.

Note: this was the last functionality which was working
properly on evergreen but not on cayman.

Here are the tests fixed:
spec/arb_framebuffer_no_attachments/arb_framebuffer_no_attachments-atomic/glscissor: fail pass
spec/arb_framebuffer_no_attachments/arb_framebuffer_no_attachments-query/glscissor: fail pass
deqp-gles31/functional/fbo/no_attachments/interaction/1x1ms0_default_2048x2048ms4: fail pass
deqp-gles31/functional/fbo/no_attachments/npot_size/1x1: fail pass

Fixes: 87a5b07f90 ("gallium/radeon: add R600/Evergreen/Cayman support to common viewport code")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38743>
 2025-12-08 15:04:24 +00:00
Georg Lehmann 7f6bd8b003 nir/peephole_select: allow mbcnt_amd 
It's just alu, so handle it like alu.

Foz-DB Navi21:
Totals from 3 (0.00% of 97591) affected shaders:
Instrs: 433 -> 426 (-1.62%)
CodeSize: 2408 -> 2388 (-0.83%)
Latency: 7520 -> 7925 (+5.39%)
InvThroughput: 857 -> 1009 (+17.74%)
Copies: 55 -> 43 (-21.82%)
Branches: 21 -> 17 (-19.05%)
SALU: 79 -> 76 (-3.80%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38828>
 2025-12-08 10:52:48 +00:00
Georg Lehmann 005cc4110c nir/peephole_select: allow ballot 
We can allow collapsing control flow around ballot if we update the ballot
condition like we do for discards.

ballot_relaxed needs no condition update, as the result bits are undefined
for inactive invocations.

Foz-DB Navi21:
Totals from 27 (0.03% of 97591) affected shaders:
Instrs: 2554506 -> 2554469 (-0.00%); split: -0.00%, +0.00%
CodeSize: 13765636 -> 13765684 (+0.00%); split: -0.00%, +0.00%
Latency: 14186667 -> 14186861 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3542516 -> 3542595 (+0.00%); split: -0.00%, +0.00%
SClause: 52038 -> 52030 (-0.02%)
Copies: 209410 -> 208763 (-0.31%)
Branches: 83716 -> 83399 (-0.38%)
PreSGPRs: 2372 -> 2386 (+0.59%); split: -0.17%, +0.76%
VALU: 1701458 -> 1701482 (+0.00%)
SALU: 369884 -> 370107 (+0.06%); split: -0.00%, +0.07%
SMEM: 67643 -> 67634 (-0.01%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38828>
 2025-12-08 10:52:48 +00:00
Georg Lehmann 077b654cc7 nir: don't sink alu that uses ballot(true) 
Don't sink alu that uses ballot(true), as that can a local system value
and moving the alu then requires a new mov in the old location.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38829>
 2025-12-08 09:07:54 +00:00
Dave Airlie 96662cd459 nak/cmat: free the type mapping hash table. 
Just noticed this on review.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38843>
 2025-12-08 08:08:56 +10:00
Romaric Jodin 6b67ca2e8f pan/bi: Keep vectorized phis 
When the source contains vectorized phis, keep them to avoid
generating unnecessary moves.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38772>
 2025-12-06 07:22:47 +00:00
Faith Ekstrand d3a890a58e pan/bi: Handle small vectors in bi_src_index() 
bit_size <= 32 does not actually guarantee a single component, which
nir_src_as_uint() requires.  We could just check num_components == 1 but
it's easy enough to support any vector that fits in 32 bits.

Cc: mesa-stable
Reviewed-by: Romaric Jodin <rjodin@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38772>
 2025-12-06 07:22:47 +00:00
Marek Olšák a051d4ee6b nir/lower_io_vars: don't insert output stores for unrelated streams before emits 
Before every emit_vertex(stream_id = n), we would insert stores for all
outputs, including outputs that are not meant for that stream.
Those stores would end up having no effect while potentially reducing
performance.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38100>
 2025-12-06 02:27:46 +00:00
Jesse Natalie 0ac9ccb4b4 d3d12: Only try to compute scaled point size for stream 0 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38100>
 2025-12-06 02:27:46 +00:00
Arcady Goldmints-Orlov 0df8aa940c nir: Use nir_shader_intrinsics_pass in nir_lower_io_to_scalar 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38816>
 2025-12-05 22:30:22 +00:00
Val Packett e9ad86db08 tu: support driconf option force_vk_vendor 
Some games refuse to start with an unknown (to them) GPU vendor. Enable
the usual way to override the vendor ID in this driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38795>
 2025-12-05 22:05:35 +00:00
Marek Olšák c0e6b0aca0 zink/ci: update fixed tests 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38587>
 2025-12-05 21:22:41 +00:00
Marek Olšák ae36b9e345 radeonsi: enable 64K x 64K textures 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38587>
 2025-12-05 21:22:41 +00:00