freedreno/crashdec: Dump cmdstream at end

With gen8 we need to decode more sections before we have enough CP reg
vals to decode cmdstream.  So simplify things by just moving it to the
end.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
This commit is contained in:
Rob Clark
2025-10-15 07:07:30 -07:00
committed by Marge Bot
parent 40b21f115d
commit 8c372e8617
4 changed files with 11961 additions and 11951 deletions
+18 -8
View File
@@ -85,6 +85,8 @@ replacestr(char *line, const char *find, const char *replace)
static char *lastline;
static char *pushedline;
static void decode_finalize(void);
static const char *
popline(void)
{
@@ -98,8 +100,10 @@ popline(void)
free(lastline);
size_t n = 0;
if (getline(&r, &n, in) < 0)
if (getline(&r, &n, in) < 0) {
decode_finalize();
exit(0);
}
/* Handle section name typo's from earlier kernels: */
r = replacestr(r, "CP_MEMPOOOL", "CP_MEMPOOL");
@@ -1115,12 +1119,6 @@ decode(void)
decode_gmu_hfi();
} else if (startswith(line, "registers:")) {
decode_registers();
/* after we've recorded buffer contents, and CP register values,
* we can take a stab at decoding the cmdstream:
*/
if (!snapshot)
dump_cmdstream();
} else if (startswith(line, "registers-gmu:")) {
decode_gmu_registers();
} else if (startswith(line, "indexed-registers:")) {
@@ -1131,11 +1129,23 @@ decode(void)
decode_clusters();
} else if (startswith(line, "debugbus:")) {
decode_debugbus();
do_snapshot();
}
}
}
static void
decode_finalize(void)
{
/* Dump cmdstream at the end after we know we've decoded all sections that might
* contain reg vals needed for locating the cmdstream:
*/
if (!snapshot)
dump_cmdstream();
/* If we are exporting snapshot, finalize it now: */
do_snapshot();
}
/*
* Usage and argument parsing:
*/
+66 -66
View File
@@ -1655,72 +1655,6 @@ registers:
00000000 0xb621: 00000000
00000000 0xb622: 00000000
00000000 0xb623: 00000000
got rb_base=1000000001000
IB1: 100000000, 5
IB2: 0, 0
found ring!
got cmdszdw=31
opcode: CP_REG_TO_MEM (3e) (4 dwords)
{ REG = 0x400 | CNT = 2 | 64B }
{ DEST = 0x1000000000028 }
gpuaddr:0001000000000028
0000000000000000: 0000: 703e8003 40080400 00000028 00010000
opcode: CP_REG_TO_MEM (3e) (4 dwords)
{ REG = 0x1f888 | CNT = 2 | 64B }
{ DEST = 0x1000000000038 }
gpuaddr:0001000000000038
0000000000000000: 0000: 703e8003 4009f888 00000038 00010000
opcode: CP_EVENT_WRITE (46) (2 dwords)
{ EVENT = PC_CCU_INVALIDATE_DEPTH }
event PC_CCU_INVALIDATE_DEPTH
0000000000000000: 0000: 70460001 00000018
opcode: CP_EVENT_WRITE (46) (2 dwords)
{ EVENT = PC_CCU_INVALIDATE_COLOR }
event PC_CCU_INVALIDATE_COLOR
0000000000000000: 0000: 70460001 00000019
opcode: CP_INDIRECT_BUFFER (3f) (4 dwords)
{ IB_BASE = 0x100000000 }
{ IB_SIZE = 0xc }
opcode: CP_SET_MARKER (65) (2 dwords)
{ MARKER_MODE = SET_RENDER_MODE | MODE = RM6_DIRECT_RENDER }
0000000100000000: 0000: 70e50001 00000001
opcode: CP_NOP (10) (1 dwords)
0000000100000008: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
000000010000000c: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000010: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000014: 0000: 70108000
bad type! deadd00d
opcode: CP_NOP (10) (1 dwords)
ESTIMATED CRASH LOCATION!
000000010000001c: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000020: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000024: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000028: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
000000010000002c: 0000: 70108000
0000000000000000: 0000: 70bf8003 00000000 00000001 0000000c
opcode: CP_REG_TO_MEM (3e) (4 dwords)
{ REG = 0x400 | CNT = 2 | 64B }
{ DEST = 0x1000000000030 }
gpuaddr:0001000000000030
0000000000000000: 0000: 703e8003 40080400 00000030 00010000
opcode: CP_REG_TO_MEM (3e) (4 dwords)
{ REG = 0x1f888 | CNT = 2 | 64B }
{ DEST = 0x1000000000040 }
gpuaddr:0001000000000040
0000000000000000: 0000: 703e8003 4009f888 00000040 00010000
opcode: CP_EVENT_WRITE (46) (5 dwords)
{ EVENT = CACHE_FLUSH_TS | IRQ }
{ ADDR = 0x1000000000004 }
{ 3 = 0x1 }
event CACHE_FLUSH_TS
0000000000000000: 0000: 70460004 80000004 00000004 00010000 00000001
registers-gmu:
00000001 GMU_ICACHE_CONFIG: 0x1
00000001 GMU_DCACHE_CONFIG: 0x1
@@ -7457,3 +7391,69 @@ debugbus:
count: 512
- debugbus-block: A6XX_DBGBUS_VBIF
count: 170
got rb_base=1000000001000
IB1: 100000000, 5
IB2: 0, 0
found ring!
got cmdszdw=31
opcode: CP_REG_TO_MEM (3e) (4 dwords)
{ REG = 0x400 | CNT = 2 | 64B }
{ DEST = 0x1000000000028 }
gpuaddr:0001000000000028
0000000000000000: 0000: 703e8003 40080400 00000028 00010000
opcode: CP_REG_TO_MEM (3e) (4 dwords)
{ REG = 0x1f888 | CNT = 2 | 64B }
{ DEST = 0x1000000000038 }
gpuaddr:0001000000000038
0000000000000000: 0000: 703e8003 4009f888 00000038 00010000
opcode: CP_EVENT_WRITE (46) (2 dwords)
{ EVENT = PC_CCU_INVALIDATE_DEPTH }
event PC_CCU_INVALIDATE_DEPTH
0000000000000000: 0000: 70460001 00000018
opcode: CP_EVENT_WRITE (46) (2 dwords)
{ EVENT = PC_CCU_INVALIDATE_COLOR }
event PC_CCU_INVALIDATE_COLOR
0000000000000000: 0000: 70460001 00000019
opcode: CP_INDIRECT_BUFFER (3f) (4 dwords)
{ IB_BASE = 0x100000000 }
{ IB_SIZE = 0xc }
opcode: CP_SET_MARKER (65) (2 dwords)
{ MARKER_MODE = SET_RENDER_MODE | MODE = RM6_DIRECT_RENDER }
0000000100000000: 0000: 70e50001 00000001
opcode: CP_NOP (10) (1 dwords)
0000000100000008: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
000000010000000c: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000010: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000014: 0000: 70108000
bad type! deadd00d
opcode: CP_NOP (10) (1 dwords)
ESTIMATED CRASH LOCATION!
000000010000001c: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000020: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000024: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
0000000100000028: 0000: 70108000
opcode: CP_NOP (10) (1 dwords)
000000010000002c: 0000: 70108000
0000000000000000: 0000: 70bf8003 00000000 00000001 0000000c
opcode: CP_REG_TO_MEM (3e) (4 dwords)
{ REG = 0x400 | CNT = 2 | 64B }
{ DEST = 0x1000000000030 }
gpuaddr:0001000000000030
0000000000000000: 0000: 703e8003 40080400 00000030 00010000
opcode: CP_REG_TO_MEM (3e) (4 dwords)
{ REG = 0x1f888 | CNT = 2 | 64B }
{ DEST = 0x1000000000040 }
gpuaddr:0001000000000040
0000000000000000: 0000: 703e8003 4009f888 00000040 00010000
opcode: CP_EVENT_WRITE (46) (5 dwords)
{ EVENT = CACHE_FLUSH_TS | IRQ }
{ ADDR = 0x1000000000004 }
{ 3 = 0x1 }
event CACHE_FLUSH_TS
0000000000000000: 0000: 70460004 80000004 00000004 00010000 00000001
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff