freedreno/crashdec: Dump cmdstream at end
With gen8 we need to decode more sections before we have enough CP reg vals to decode cmdstream. So simplify things by just moving it to the end. Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
This commit is contained in:
@@ -85,6 +85,8 @@ replacestr(char *line, const char *find, const char *replace)
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static char *lastline;
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static char *pushedline;
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static void decode_finalize(void);
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static const char *
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popline(void)
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{
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@@ -98,8 +100,10 @@ popline(void)
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free(lastline);
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size_t n = 0;
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if (getline(&r, &n, in) < 0)
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if (getline(&r, &n, in) < 0) {
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decode_finalize();
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exit(0);
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}
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/* Handle section name typo's from earlier kernels: */
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r = replacestr(r, "CP_MEMPOOOL", "CP_MEMPOOL");
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@@ -1115,12 +1119,6 @@ decode(void)
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decode_gmu_hfi();
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} else if (startswith(line, "registers:")) {
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decode_registers();
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/* after we've recorded buffer contents, and CP register values,
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* we can take a stab at decoding the cmdstream:
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*/
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if (!snapshot)
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dump_cmdstream();
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} else if (startswith(line, "registers-gmu:")) {
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decode_gmu_registers();
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} else if (startswith(line, "indexed-registers:")) {
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@@ -1131,11 +1129,23 @@ decode(void)
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decode_clusters();
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} else if (startswith(line, "debugbus:")) {
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decode_debugbus();
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do_snapshot();
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}
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}
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}
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static void
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decode_finalize(void)
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{
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/* Dump cmdstream at the end after we know we've decoded all sections that might
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* contain reg vals needed for locating the cmdstream:
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*/
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if (!snapshot)
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dump_cmdstream();
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/* If we are exporting snapshot, finalize it now: */
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do_snapshot();
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}
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/*
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* Usage and argument parsing:
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*/
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@@ -1655,72 +1655,6 @@ registers:
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00000000 0xb621: 00000000
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00000000 0xb622: 00000000
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00000000 0xb623: 00000000
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got rb_base=1000000001000
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IB1: 100000000, 5
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IB2: 0, 0
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found ring!
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got cmdszdw=31
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opcode: CP_REG_TO_MEM (3e) (4 dwords)
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{ REG = 0x400 | CNT = 2 | 64B }
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{ DEST = 0x1000000000028 }
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gpuaddr:0001000000000028
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0000000000000000: 0000: 703e8003 40080400 00000028 00010000
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opcode: CP_REG_TO_MEM (3e) (4 dwords)
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{ REG = 0x1f888 | CNT = 2 | 64B }
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{ DEST = 0x1000000000038 }
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gpuaddr:0001000000000038
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0000000000000000: 0000: 703e8003 4009f888 00000038 00010000
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opcode: CP_EVENT_WRITE (46) (2 dwords)
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{ EVENT = PC_CCU_INVALIDATE_DEPTH }
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event PC_CCU_INVALIDATE_DEPTH
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0000000000000000: 0000: 70460001 00000018
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opcode: CP_EVENT_WRITE (46) (2 dwords)
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{ EVENT = PC_CCU_INVALIDATE_COLOR }
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event PC_CCU_INVALIDATE_COLOR
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0000000000000000: 0000: 70460001 00000019
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opcode: CP_INDIRECT_BUFFER (3f) (4 dwords)
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{ IB_BASE = 0x100000000 }
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{ IB_SIZE = 0xc }
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opcode: CP_SET_MARKER (65) (2 dwords)
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{ MARKER_MODE = SET_RENDER_MODE | MODE = RM6_DIRECT_RENDER }
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0000000100000000: 0000: 70e50001 00000001
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opcode: CP_NOP (10) (1 dwords)
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0000000100000008: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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000000010000000c: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000010: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000014: 0000: 70108000
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bad type! deadd00d
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opcode: CP_NOP (10) (1 dwords)
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ESTIMATED CRASH LOCATION!
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000000010000001c: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000020: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000024: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000028: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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000000010000002c: 0000: 70108000
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0000000000000000: 0000: 70bf8003 00000000 00000001 0000000c
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opcode: CP_REG_TO_MEM (3e) (4 dwords)
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{ REG = 0x400 | CNT = 2 | 64B }
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{ DEST = 0x1000000000030 }
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gpuaddr:0001000000000030
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0000000000000000: 0000: 703e8003 40080400 00000030 00010000
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opcode: CP_REG_TO_MEM (3e) (4 dwords)
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{ REG = 0x1f888 | CNT = 2 | 64B }
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{ DEST = 0x1000000000040 }
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gpuaddr:0001000000000040
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0000000000000000: 0000: 703e8003 4009f888 00000040 00010000
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opcode: CP_EVENT_WRITE (46) (5 dwords)
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{ EVENT = CACHE_FLUSH_TS | IRQ }
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{ ADDR = 0x1000000000004 }
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{ 3 = 0x1 }
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event CACHE_FLUSH_TS
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0000000000000000: 0000: 70460004 80000004 00000004 00010000 00000001
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registers-gmu:
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00000001 GMU_ICACHE_CONFIG: 0x1
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00000001 GMU_DCACHE_CONFIG: 0x1
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@@ -7457,3 +7391,69 @@ debugbus:
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count: 512
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- debugbus-block: A6XX_DBGBUS_VBIF
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count: 170
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got rb_base=1000000001000
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IB1: 100000000, 5
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IB2: 0, 0
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found ring!
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got cmdszdw=31
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opcode: CP_REG_TO_MEM (3e) (4 dwords)
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{ REG = 0x400 | CNT = 2 | 64B }
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{ DEST = 0x1000000000028 }
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gpuaddr:0001000000000028
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0000000000000000: 0000: 703e8003 40080400 00000028 00010000
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opcode: CP_REG_TO_MEM (3e) (4 dwords)
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{ REG = 0x1f888 | CNT = 2 | 64B }
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{ DEST = 0x1000000000038 }
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gpuaddr:0001000000000038
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0000000000000000: 0000: 703e8003 4009f888 00000038 00010000
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opcode: CP_EVENT_WRITE (46) (2 dwords)
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{ EVENT = PC_CCU_INVALIDATE_DEPTH }
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event PC_CCU_INVALIDATE_DEPTH
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0000000000000000: 0000: 70460001 00000018
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opcode: CP_EVENT_WRITE (46) (2 dwords)
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{ EVENT = PC_CCU_INVALIDATE_COLOR }
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event PC_CCU_INVALIDATE_COLOR
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0000000000000000: 0000: 70460001 00000019
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opcode: CP_INDIRECT_BUFFER (3f) (4 dwords)
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{ IB_BASE = 0x100000000 }
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{ IB_SIZE = 0xc }
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opcode: CP_SET_MARKER (65) (2 dwords)
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{ MARKER_MODE = SET_RENDER_MODE | MODE = RM6_DIRECT_RENDER }
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0000000100000000: 0000: 70e50001 00000001
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opcode: CP_NOP (10) (1 dwords)
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0000000100000008: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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000000010000000c: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000010: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000014: 0000: 70108000
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bad type! deadd00d
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opcode: CP_NOP (10) (1 dwords)
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ESTIMATED CRASH LOCATION!
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000000010000001c: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000020: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000024: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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0000000100000028: 0000: 70108000
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opcode: CP_NOP (10) (1 dwords)
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000000010000002c: 0000: 70108000
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0000000000000000: 0000: 70bf8003 00000000 00000001 0000000c
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opcode: CP_REG_TO_MEM (3e) (4 dwords)
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{ REG = 0x400 | CNT = 2 | 64B }
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{ DEST = 0x1000000000030 }
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gpuaddr:0001000000000030
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0000000000000000: 0000: 703e8003 40080400 00000030 00010000
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opcode: CP_REG_TO_MEM (3e) (4 dwords)
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{ REG = 0x1f888 | CNT = 2 | 64B }
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{ DEST = 0x1000000000040 }
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gpuaddr:0001000000000040
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0000000000000000: 0000: 703e8003 4009f888 00000040 00010000
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opcode: CP_EVENT_WRITE (46) (5 dwords)
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{ EVENT = CACHE_FLUSH_TS | IRQ }
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{ ADDR = 0x1000000000004 }
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{ 3 = 0x1 }
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event CACHE_FLUSH_TS
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0000000000000000: 0000: 70460004 80000004 00000004 00010000 00000001
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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