AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
210,094 Commits 1 Branch 0 Tags
efab2205faa0ebcd3fa91a66178c57a94961e006
Commit Graph

194455 Commits

Author SHA1 Message Date
Lars-Ivar Hesselberg Simonsen efab2205fa panvk: Add utrace tracepoints in queue_submit 
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:30 +00:00
Lars-Ivar Hesselberg Simonsen 856daf4ce2 panvk/utrace: Add flush_cache support 
Also pulls flush_cache information out of the barrier tracepoint.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:30 +00:00
Lars-Ivar Hesselberg Simonsen 2c8d77b94a panvk/utrace: Add sync32/64_add support 
Add the ability to capture sync32/64_add during tracing.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:30 +00:00
Lars-Ivar Hesselberg Simonsen 4709dcaf52 panvk/utrace: Add sync32/64_wait support 
Add support for capturing sync32/64_wait including the addresses and
values they wait for.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:30 +00:00
Lars-Ivar Hesselberg Simonsen 5d71bf46a7 panvk/utrace: Add support for storing registers 
Add the ability to store specific register values during tracing by
using the indirect capture capability.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:29 +00:00
Lars-Ivar Hesselberg Simonsen c2e0ce16fb panvk/utrace: Make indirect capture wait optional 
Unless the command we're tracing produces the data we want to capture,
there is no need to wait for its timestamp write.

Currently, there is no such case, so make it the responsibility of the
caller instead of implicitly adding the wait.

Also remove and unnecessary wait for the LS scoreboard after the copy
buffer store.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:29 +00:00
Lars-Ivar Hesselberg Simonsen abffb96c46 panvk/utrace: Pass async_op instead of mask 
This is needed to trace cs_defer_indirect.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:29 +00:00
Lars-Ivar Hesselberg Simonsen db4bcd48d7 panvk: Fix IUB decode 
The buffer is only an IUB if it's within the size of the resource entry.
Otherwise, it might just be a buffer that landed just after the
descriptor allocation.

Fixes: fb38f10240 ("panvk: Handle IUBs in decoder")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:29 +00:00
Lars-Ivar Hesselberg Simonsen e5b828e808 panvk: Fix instrumentation on v12+ 
Ensure we stay within the maximum tuple size when copying.

Fixes: 172dead3df ("panvk: Increase CSF scratch limits on v12+")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:29 +00:00
Lars-Ivar Hesselberg Simonsen 78ca5ef87f u_trace: Indirect capture fixes 
Fixes a missing sizeof parenthesis.
Fixes multiple indirects writing to the same address.

Fixes: 0a17035b5c ("u_trace: add support for indirect data")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36519>
 2025-08-11 10:12:29 +00:00
Samuel Pitoiset 4580293ab2 radv: implement RB+ depth-only rendering for better perf 
For RB+ depth-only, the following registers must be configured like:

 - CB_COLOR_CONTROL.MODE = CB_DISABLE
 - CB_COLOR0_INFO.FORMAT = COLOR_32
 - CB_COLOR0_INFO.NUMBER_TYPE = NUMBER_FLOAT
 - SPI_SHADER_COL_FORMAT.COL0_EXPORT_FORMAT = SPI_SHADER_32_R
 - SX_PS_DOWNCONVERT.MRT0 = SX_RT_EXPORT_32_R

This might increase performance for depth-only rendering passes on
GFX9+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28590>
 2025-08-11 09:45:15 +00:00
David Rosca 26d98d283b radv: Fix alignment for linear video decode dst images 
OPTIMAL is actually linear for VCN4 and older, so this needs to check
the surface flags instead.

Fixes: 2d06b43292 ("radv: Enable tiling for video images on VCN5")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36669>
 2025-08-11 09:25:18 +00:00
Samuel Pitoiset 9648d256db radv: remove cs parameter for gfx12 push SH reg helpers 
It's also much cleaner now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36679>
 2025-08-11 08:30:42 +00:00
Samuel Pitoiset 2c943b9bf8 radv: remove cs parameter for all opt context emit helpers 
radeon_begin takes a radv_cmd_stream, so it's much cleaner now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36679>
 2025-08-11 08:30:42 +00:00
Samuel Pitoiset 80678c7722 radv: cleanup some redundant cmd_buffer->cs occurrences 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36679>
 2025-08-11 08:30:42 +00:00
Samuel Pitoiset 69a8972ce1 radv/ci: uprev kernel to 6.15.9 
This contains the zerovram fix (not the one that affects performance
yet though).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36675>
 2025-08-11 07:48:05 +00:00
Pavel Ondračka c8ef472ae2 i915/ci: update CI expectations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36703>
 2025-08-11 06:32:18 +00:00
Valentine Burley 2e58cc8941 zink/ci: Document more flakes on ANV 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36671>
 2025-08-11 06:14:16 +00:00
Valentine Burley e4bce65037 zink/ci: Add a prefix for X11 dEQP-EGL on ANV 
Makes things clearer.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36671>
 2025-08-11 06:14:16 +00:00
Qiang Yu bfd7f498a5 nir/opt_varying: remove assert for mesh shader crash 
This assert is not true when mesh shader.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:45 +00:00
Qiang Yu 980e125e31 mesa: add mesh shader extension state 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:45 +00:00
Qiang Yu e24082cfe0 mesa: count mesh shader when init limits 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:45 +00:00
Qiang Yu 13312c12fb mesa: set a more accurate value for combined limits 
Program can only contain either graphics shaders or compute
shader. So these limits should use a MAX2 for different
shader pipeline.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:44 +00:00
Qiang Yu 5f1983f346 glsl,gallium,mesa: replace MESA_SHADER_STAGES with MESA_SHADER_MESH_STAGES 
Prepare for mesh shader support, change all shared code to
use MESA_SHADER_MESH_STAGES.

Use command:
  find src/gallium/auxiliary/ -type f -not -path '*/.git/*' -exec sed -i 's/\bMESA_SHADER_STAGES\b/MESA_SHADER_MESH_STAGES/g' {} +
  find src/compiler -type f -not -path '*/.git/*' -exec sed -i 's/\bMESA_SHADER_STAGES\b/MESA_SHADER_MESH_STAGES/g' {} +
  find src/mesa -type f -not -path '*/.git/*' -exec sed -i 's/\bMESA_SHADER_STAGES\b/MESA_SHADER_MESH_STAGES/g' {} +

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:44 +00:00
Qiang Yu fba8bddc4f mesa: init program constants for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:43 +00:00
Qiang Yu 4ce6448f2a mesa: enlarge the shader resourse limits for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:43 +00:00
Qiang Yu 4b8c63e211 gallium/dd: enlarge shader string for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:42 +00:00
Qiang Yu 4aa2510bc0 radeonsi: do not init nir_options for mesh shader 
nir_options array include mesh shader, radeonsi does not
support mesh shader at this point.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:42 +00:00
Qiang Yu d42936c6a7 compiler: adjust comments for mesa_shader_stage 
We're going to support mesh shader in GL, the stage order
is not sorted as comment described.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:42 +00:00
Qiang Yu 08b643f244 mesa/st: use shader_caps.max_instructions to check shader present 
It's documented cap for shader presentation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:42 +00:00
Qiang Yu e697b9119e mesa,gallium: remove tgsi_processor_to_shader_stage 
It just pass though the input.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:42 +00:00
Qiang Yu aebf0abbf1 gallium: add mesh shader caps 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36596>
 2025-08-11 01:44:41 +00:00
Yiwei Zhang d88fd2c582 vulkan/wsi/headless: clean up headless wsi device and headers 
Still keep the wsi_headless container in case of future customizations.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36687>
 2025-08-10 07:16:46 +00:00
Yiwei Zhang 90caf9bdbd vulkan/wsi/headless: drop the wsi_create_null_image_mem override 
The existing wsi code paths work in the most correct manner now w.r.t
implicit fencing, memory allocation, prime buffer blit, etc.

With this and the prior change, ANV with headless doubled the perf and
beats the windowed vkmark run.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36687>
 2025-08-10 07:16:46 +00:00
Yiwei Zhang 6ac8ac38f1 vulkan/wsi/headless: acquire the most likely idle image 
Previously the present marks the image free, and the next acquire would
immediately acquire the just presented image back, which likely still
has pending gpu work going on. To avoid introducing a present queue in
headless, we simply tweak to acquire swapchain images in a loop to give
the app the most likely idle image.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36687>
 2025-08-10 07:16:46 +00:00
Yonggang Luo 826c7fec4b gallium/mesa: Change type of tgsi_shader_info::processor st_init_limits::sh to mesa_shader_stage 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36698>
 2025-08-10 06:09:49 +00:00
Yonggang Luo 5a93e94d83 gallium: Remove unused TRACE_FLAG_USER_BUFFER 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36698>
 2025-08-10 06:09:49 +00:00
Yonggang Luo a5522142f8 broadcom: gl_shader_stage_to_broadcom => mesa_shader_stage_to_broadcom 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36698>
 2025-08-10 06:09:49 +00:00
Olivia Lee c11f47481a panvk: stop CPU mapping all index buffers on JM 
This can be removed now that we do compute shader minmax. Fixes failed
mmap errors on PPSSPP and some other vulkan applications:

MESA: error: mmap(..., size=4194304, prot=2, flags=0x1) failed: Invalid argument

Fixes: e25064c026 ("panvk: Use indirect path for indexed draw on JM")
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36695>
 2025-08-09 01:21:43 -07:00
llyyr dbb779967c vulkan: Update enum_to_str conversion to handle AMDX enum names 
Without this, mesa fails to build with:
src/vulkan/util/vk_enum_to_str.c:684:14: error:
‘VK_COMPRESSED_TRIANGLE_FORMAT_AMDX_MAX_ENUM’ undeclared (first use in
this function); did you mean
‘VK_COMPRESSED_TRIANGLE_FORMAT_MAX_ENUM_AMDX’?

Fixes: c74ad9f142 ("vulkan: Update headers/xml for 1.4.325")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36693>
 2025-08-09 01:24:10 +00:00
Yiwei Zhang c58b3fa3a4 venus: fix a race condition in ring shmem reuse 
With the shmem cache, vkDestroyRingMESA must be a synchronous call to
ensure renderer side ring destruction has finished before the same shmem
gets reused by other things.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13672
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36664>
 2025-08-09 00:24:28 +00:00
Faith Ekstrand 65f3d7fb7f nvk: Advertise KHR_shader_untyped_pointers 
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36681>
 2025-08-08 22:41:15 +00:00
Caio Oliveira e8fe6273f9 anv: Advertise VK_KHR_shader_untyped_pointers 
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36681>
 2025-08-08 22:41:15 +00:00
Caio Oliveira c74ad9f142 vulkan: Update headers/xml for 1.4.325 
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36681>
 2025-08-08 22:41:14 +00:00
Caio Oliveira c00b167d16 vulkan: Update enum_to_str conversion to handle ARM enum names 
Next Vulkan update will have
VK_DATA_GRAPH_PIPELINE_PROPERTY_MAX_ENUM_ARM and similar names,
so apply the same rule for ARM prefix.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36681>
 2025-08-08 22:41:14 +00:00
Caio Oliveira 12cdcccf24 spirv: Update headers and metadata from latest Khronos commit 
This corresponds to a7361efd139bf65de0e86d43b01b01e0b34d387f
("Fixed typo in operand name of OpSubgroupAvcImeSetDualReferenceINTEL (#537)")
in https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36681>
 2025-08-08 22:41:14 +00:00
Kenneth Graunke 5e9de5317e brw: Validate that send payloads can't be imms or have source mods 
To ensure we haven't missed resolving these things.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
 2025-08-08 22:12:11 +00:00
Kenneth Graunke 22165defb5 brw: Drop interlock and memory fence logical opcodes from is_payload() 
These are lowered to sends prior to any callers of this helper.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
 2025-08-08 22:12:11 +00:00
Kenneth Graunke ed4fadbb16 brw: Drop INTERPOLATE_AT_* opcodes from is_payload() 
These are lowered to sends prior to any callers of this helper.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
 2025-08-08 22:12:10 +00:00
Kenneth Graunke e2022017ce brw: Drop uniform pull constant load virtual opcode from is_send() 
The logical send lowering already resolves sources when constructing
the send payload, so prior to that lowering, we don't need to apply
any special restrictions here.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
 2025-08-08 22:12:10 +00:00