AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
193,890 Commits 1 Branch 0 Tags
e3e28bb514b064c16c6a00733736fa863287da2e
Commit Graph

193890 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Samuel Pitoiset e3e28bb514 radv: stop emitting PA_SC_CLIPRECT_RULE in the GFX preamble 
It's already emitted as part of the discard rectangle state and all
dynamic states are dirty when a cmdbuf begins

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30788>
 2024-08-23 09:50:40 +00:00
Samuel Pitoiset 4662483535 radv: stop emitting DB_RENDER_OVERRIDE in the GFX preamble 
It's already emitted as part of the depth clamp enable state and all
dynamic states are dirty when a cmdbuf begins.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30788>
 2024-08-23 09:50:40 +00:00
Samuel Pitoiset cd57411aaa radv: remove redundant PA_SU_PRIM_FILTER_CNTL in the GFX preamble 
It's already emitted below.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30788>
 2024-08-23 09:50:40 +00:00
David Rosca 6e2ae9c581 radeonsi/vcn: Use pipe header params in H264 header encoder 
This now supports writing all fields as we get them on input from
packed headers.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 10:00:02 +02:00
David Rosca af849516f0 radeonsi/vcn: Use pipe header params in HEVC header encoder 
This now supports writing all fields as we get them on input from
packed headers.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 10:00:02 +02:00
David Rosca 138ba42a87 radeonsi/vcn: Fix radeon_enc_code_ue with values over 2^16 
Values over 2^16 as ue(v) are encoded with more than 32 bits,
but radeon_enc_code_fixed_bits can only handle 32 bits at max.
Change radeon_enc_code_ue to code the leading zeros separately.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 10:00:02 +02:00
David Rosca 40d01175be radeonsi/vcn: Deduplicate header encoding functions 
There is no need to separate these by VCN version.
For VCN < 3.0 transform skip must be disabled and for VCN < 2.0
SAO must be disabled.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 10:00:02 +02:00
David Rosca 32c6a61e2b radeonsi/vcn: Switch to app DPB management for H264 and HEVC encode 
This removes the internal DPB management logic, which was unnecessary as
it was duplicating what applications already do, and it was also causing
issues when the internal DPB would de-sync from application DPB (eg.
driver removes reference that application still intends to use).

DPB is now dynamically resized instead of using fixed number of slots.
This also saves a lot of memory with HEVC encoding, as that was always
using the max_references which va frontend sets to 15.

Move reconstructed pictures to the end of the context and meta buffers
to ensure resizing works correctly.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 09:59:58 +02:00
David Rosca 322240fcff radeonsi: Add GPU copy path to si_video_resize_buffer 
Use si_copy_buffer instead of map + memcpy for buffers in VRAM.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 06:54:07 +00:00
David Rosca 1de2cc648b frontends/omx: Adjust to encoding changes 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 06:54:07 +00:00
David Rosca ef8ba75718 frontends/va: Parse HEVC slice packed header 
This also adds additional fields from VPS, SPS and PPS.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 06:54:07 +00:00
David Rosca c78ebe97c6 frontends/va: Parse H264 slice packed header 
This also adds additional fields from SPS and PPS.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 06:54:07 +00:00
David Rosca f5af70c6b8 frontends/va: Only use parameters for first slice in H264/5 encode 
We don't store these params per slice, so we should only use the values
from first slice.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 06:54:06 +00:00
David Rosca cc14724d73 frontends/va: Implement DPB management for H264/5 encode 
In VAAPI applications already need to do DPB management, but for each
picture to encode we only get the reconstructed surfaces needed to
encode this picture instead of entire DPB. Drivers need to know the
current size and layout of DPB, so keep track of entire DPB contents
in frontend.

This allows drivers to directly get the DPB layout as used by
application instead of trying to re-build it from limited information
they have available (frame numbers), which only works in the basic cases
and otherwise will de-sync from application (driver may remove pictures from
DPB that the application still want to use).

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 06:54:06 +00:00
David Rosca fc1ec3c5d4 util/rbsp: Fill bits again if reading more than 16 leading zeros 
Same as 73d69ef1e6, this is also needed for vl_rbsp_ue.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
 2024-08-23 06:54:06 +00:00
Tapani Pälli 5bf6602d23 anv: check if RT writes are happening for HasWriteableRT 
Fixes: eebb6cd236 ("anv: stop using 3DSTATE_WM::ForceThreadDispatchEnable")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11749
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30785>
 2024-08-23 06:28:00 +00:00
Mary Guillemard a63277cc17 panvk: Remove unused vk_vertex_input_state in graphics_save_ctx 
This is unused and duplicated in dyn_state::vi

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30782>
 2024-08-23 06:11:39 +00:00
Mary Guillemard 1710925282 panvk: Save and restore vertex buffer in gfx_meta 
This was missing from the vk_meta switch.

This fixes
"dEQP-VK.draw.renderpass.multiple_clears_within_render_pass.*"

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: f74dd596d5 ("panvk: Add helpers to save/restore the compute/graphics state for meta operations")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30782>
 2024-08-23 06:11:39 +00:00
Mary Guillemard a659cd3b03 panvk: Simplify meta ctx save/restore 
As dynamic state is marked as dirty, there is no point to save the state
of related resources.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30782>
 2024-08-23 06:11:39 +00:00
Mary Guillemard ff24a8384c panvk: Manually copy dynamic state in meta_gfx 
This fixes assertion for "dEQP-VK.dynamic_state.monolithic.image.*" when
the viewport state would have some dynamic state set before binding any
pipelines.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: f74dd596d5 ("panvk: Add helpers to save/restore the compute/graphics state for meta operations")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30782>
 2024-08-23 06:11:39 +00:00
Mary Guillemard 1d33aee197 panvk: Close batch in CmdBeginRendering if already open 
Because of the current event implementation, we can end up with an open
batch when entering CmdBeginRendering. As a result, we now reopen a
batch in that situation for now.

This fix crashes various crash in
"dEQP-VK.synchronization.op.single_queue.event.*".

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30782>
 2024-08-23 06:11:39 +00:00
Lionel Landwerlin a88898a28f anv: optimize CLIP::MaximumVPIndex setting 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11746
Fixes: 982106e676 ("anv: only set 3DSTATE_CLIP::MaximumVPIndex once")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30762>
 2024-08-23 05:45:03 +00:00
Timothy Arceri 038b3c24d7 ci: bump piglit version 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30752>
 2024-08-23 14:55:21 +10:00
Timothy Arceri 4c32709c74 glsl: fix function overload resolution at link time 
Previously we didn't check if the glsl version supported overload resolution
at link time only compile time. Note with this change we just use the
has_implicit_int_to_uint_conversion bool as support for both is added under
the same conditions.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30752>
 2024-08-23 12:14:22 +10:00
Timothy Arceri 8e4b14dcfd glsl: apply implicit matching rules when linking 
Previously when linking i.e. when compiler state was NULL. We just
assumed all implicit matching was avaliable.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30752>
 2024-08-23 12:14:22 +10:00
Timothy Arceri 018ebeca72 glsl: store has implicit conversions bools in gl_shader 
We want to be able to use these at link time also.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30752>
 2024-08-23 12:14:22 +10:00
Timothy Arceri ac312e9548 glsl: drop double support checks in helper 
If doubles are not supported by the shader the compiler will throw
an error if it sees one, there is no need to check if they are
supported in this helper for implicit conversions.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30752>
 2024-08-23 12:14:22 +10:00
Kenneth Graunke b97e10208c intel/brw: Add a file parameter to idom_tree::dump() 
The other dump methods in this file also take a file parameter,
defaulting to stderr.  Dumping dot files to stdout is probably not
what anybody really wanted.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30530>
 2024-08-22 22:54:45 +00:00
Kenneth Graunke bb4f05005e intel/brw: Print blocks in brw_print_instructions_to_file() 
Useful when examining the control flow graph.  For some reason,
we printed this for the final assembly but not the IR.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30530>
 2024-08-22 22:54:45 +00:00
Kenneth Graunke 2d73e42333 intel/brw: Fix OOB reads when printing instructions post-reg-alloc 
Post-register allocation, but before brw_fs_lower_vgrfs_to_fixed_grfs,
we have registers with the VGRF file but they are actually fixed GRFs.

brw_print_instructions_to_file() was seeing VGRFs and trying to access
their size, but using bogus register numbers that could be out-of-bound.

Detect when we're post-RA and avoid doing this.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30530>
 2024-08-22 22:54:45 +00:00
antonino 9f5af68995 mesa/main: expose EXT_multi_draw_indirect 
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
antonino 582eb2439c panfrost: advertise PIPE_CAP_MULTI_DRAW_INDIRECT 
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
Louis-Francis Ratté-Boulianne f390835074 panfrost: use special DrawID register on CSF-based GPUs 
It allows easier support for multi indirect draws by updating the
draw ID value in each iteration of the loop.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
Louis-Francis Ratté-Boulianne ce76caf3ee pan/bi: implement nir_intrinsic_load_draw_id 
Only valid on >= 9

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
antonino 676afca468 panfrost: implement multi draw indirect for CSF-based GPUs 
Add a CSF loop to allow for multiple indirect draws in one call.
Same limitation applies than for single indirect draw, the call
will get emulated if transform feedback or a query is enabled.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
antonino 7c1fe4bdbe pan/cs: add helpers to generate csf loop 
Add support for loops where we continually check whether a
condition is met. Also add a `cs_while` pseudo-instruction to more
easily use that feature.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
antonino 50d2396b7e pan/cs: add helpers to emit contiguous csf code blocks 
Add support for block, a monolithic sequence of instruction that
must live in a virtually contiguous portion of code, and label, a
reference to a specific position in a block.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:21 +00:00
antonino 8b8de5ad9d panfrost: implement indirect draw for CSF-based GPUs 
Implement indirect draw by reading the indirect buffer info in CSF
and triggering the IDVS operation just like for a normal direct
draw. If transform feedback or a query is enabled, we still emulate
the indirect draw on the CPU to properly update the XFB buffer
offset and primitives statistics.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:21 +00:00
antonino 3b871856d1 panfrost: refactor draw logic to support native draw indirect 
Split the draw logic into multiple methods depending on whether
the draw is single direct, multiple direct or indirect. Indirect
draws are emulated for now by reading back the indirect buffer info,
but we can implement optimized version later for JM and CSF.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:21 +00:00
antonino d8b6a59896 panfrost: rename PAN_GPU_INDIRECTS 
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:21 +00:00
Eric Engestrom 84d2401de3 ci: don't run hardware tests if the toml files don't pass validation 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30442>
 2024-08-22 20:25:32 +00:00
Eric Engestrom 1ba84bc5ca ci: add check for misleading indentation in ci toml files 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30442>
 2024-08-22 20:25:32 +00:00
Lionel Landwerlin d9406658ed brw: remove unused prog_data field 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:40 +00:00
Lionel Landwerlin cf986dd589 nir: remove unused intel intrinsics 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:40 +00:00
Lionel Landwerlin 3769b58272 anv: move lowering of descriptor intrinsics to apply_layout 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:40 +00:00
Lionel Landwerlin 45117c0ed5 anv: simplify loading driver internal constants 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:39 +00:00
Lionel Landwerlin 7a55a930f6 anv: reuse common pipeline state for compute push allocations 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:39 +00:00
Denis afb7b17fdd freedreno: Enable A505 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23630>
 2024-08-22 19:11:52 +00:00
Robert Mader 70cdff1f23 perfetto: Add Panfrost data sources to system.cfg 
Just like for msm and i915, so it works out-of-the-box.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28363>
 2024-08-22 18:33:45 +00:00
Eric Engestrom 5a38361ba9 nvk/ci: document CTS bug 
Thanks to @marysaka for identifying and reporting the bug:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/11736#note_2532965

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30793>
 2024-08-22 18:20:55 +00:00