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anv: check if RT writes are happening for HasWriteableRT

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Fixes: eebb6cd236 ("anv: stop using 3DSTATE_WM::ForceThreadDispatchEnable")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11749
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30785>
This commit is contained in:
Tapani Pälli
2024-08-22 15:01:02 +03:00
committed by Marge Bot
parent a63277cc17
commit 5bf6602d23
1 changed files with 1 additions and 1 deletions
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src/intel/vulkan/genX_gfx_state.c
+1 -1
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@@ -1073,7 +1073,7 @@ genX(cmd_buffer_flush_gfx_runtime_state)(struct anv_cmd_buffer *cmd_buffer)
const uint8_t color_writes = dyn->cb.color_write_enables;
bool has_writeable_rt =
anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT) &&
(color_writes & ((1u << gfx->color_att_count) - 1)) != 0;
!anv_cmd_buffer_all_color_write_masked(cmd_buffer);
SET(BLEND_STATE, blend.AlphaToCoverageEnable,
dyn->ms.alpha_to_coverage_enable);