e3d477a04f
tu/a7xx: Always have depth/stencil in corresponding resolve groups
...
The division between color and d/s resolve groups appears to be
important. Not doing so causes corruption in some of games
when forcing gmem, e.g. in Arma, War Thunder.
Fixes: 25b73dff5adpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33169 >
2025-01-30 16:27:00 +00:00
150123349a
ac/nir/ngg: Use SALU to calculate which threads store to attribute ring in GS.
...
This trades 1 VALU (v_cmpx) instruction in GS to 2 SALU,
and removes a VALU->SALU dependency for the branch that stores
attributes.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
a9e9ec30a5
radv, radeonsi: Disable early prim export on GFX11+.
...
We suspect that it has no perf benefits on GFX11+.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
5560763e99
ac/nir/ngg: Move GS lowering to separate file.
...
Both the VS/TES and GS lowering passes have grown a lot over time,
and therefore the C file has become unwieldy. Mitigate that by
moving the GS lowering out to a separate file.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
ab8ec78c93
ac/nir/ngg: Don't call has_input_primitive in GS lowering.
...
The entire GS lowering will be moved to another file, which
won't have this function.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
910416e5ba
ac/nir/ngg: Remove now unused export_pos0_wait_attr_ring.
...
The issue is worked around now without needing to handle just
the pos0 separately.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
28fe7e2a0e
ac/nir/ngg: Rework GS output code for better attribute ring handling.
...
Create separate branches for output processing and exports.
Normally, emit attribute ring stores at the end of the shader,
but with the attribute ring wait bug, insert them between the
primitive and position export branches.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
213759d2b6
ac/nir/ngg: Carve out ngg_gs_process_out_vertex.
...
This is the part of the code that processes things related to
a single vertex, mainly loading the outputs from LDS and
performing some adjustments on them.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
4f8ee9b045
ac/nir/ngg: Carve out ngg_gs_process_out_primitive.
...
This is the part of the code that processes things related to
a single primitive, mainly the primitive export argument.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
04b4c5d785
ac/nir/ngg: Rework attribute ring wait workaround in VS/TES.
...
Normally, emit attribute ring stores at the end of the shader.
When the attribute ring wait bug is present, insert them between
the primitive and position exports.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
dec5c957c3
ac/nir/ngg: Use has_attr_ring and has_attr_ring_wait_bug in mesh shader lowering too.
...
Instead of hardcoding according to GFX level.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
f7305f776e
ac/nir/ngg: Pass radeon_info to mesh shader lowering.
...
Same idea as the VS/TES and GS lowering:
Make shader compilation decisions based on the features of the
current GPU instead of ad-hoc deciding according to GFX level.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
b8204c8df9
ac/nir/ngg: Remove gfx_level and family from NGG lowering options.
...
They can be read from radeon_info.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
dc6ae1855a
ac/nir/ngg: Use gfx_level from radeon_info.
...
So we don't have to pass it separately.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:46 +00:00
e1be943f10
ac/nir/ngg: Add and use a has_ngg_passthru_no_msg field to ac_gpu_info.
...
Instead of using the chip family field.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
a40000b85b
ac/nir/ngg: Add and use a has_ngg_fully_culled_bug field to ac_gpu_info.
...
Better than applying the workaround ad-hoc based on GFX level.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
cad0d26dbf
ac/nir/ngg: Add and use a has_attr_ring field to ac_gpu_info.
...
While theoretically all GFX11+ GPUs have an attribute ring, it is
nicer to have this property instead of deciding ad-hoc based on
the GFX level.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
b163ce51b1
ac/nir/ngg: Add and use a has_attr_ring_wait_bug field to ac_gpu_info.
...
And apply the attribute ring wait workaround based on the new field.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
e76361d626
ac/nir/ngg: Add radeon_info to NGG lowering options.
...
The intention is to have all the HW features affecting
shader compilation in one place, instead of ad-hoc decisions
in the code based on the GFX level and chip class.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
28c501f22c
ac/nir/ngg: Slightly refactor emitting vertex parameters.
...
No functional changes, just some code cleanup.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
9860fb3780
ac/nir/ngg: Carve out ac_nir_repack_invocations_in_workgroup.
...
We're going to want to call it from a different file too.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
d2ff3f9fa0
ac/nir/ngg: Carve out NGG streamout code.
...
We're going to want to call it from a different file too.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
1d8f46e00c
ac/nir/ngg: Carve out ac_nir_create_output_phis.
...
We're going to want to call it from a different file too.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
4bec453595
ac/nir/ngg: Use ac_nir_ngg_alloc_vertices_and_primitives in mesh shader lowering.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
02dacac869
ac/nir/ngg: Carve out ac_nir_ngg_alloc_vertices_and_primitives.
...
We're going to want to call it from a different file too.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
a3d8e6a60c
ac/nir/ngg: Remove unused vs_output struct.
...
Forgot to remove this when I refactored the code to use
ac_nir_prerast_out instead.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
23641d4032
ac/nir/ngg: Add a few comments explaining some variables.
...
These were somewhat confusing, so let's add a few words to
explain what they are exactly.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
28f49bf99c
ac/nir/ngg: Remove some superfluous variables from culling code.
...
No functional changes, just code cleanup.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
e9069eec8a
aco: Move NGG pos export scheduling determination to drivers.
...
And don't schedule them on GFX11+ at all.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
7a3d95bbe2
ac/nir/ngg: Mitigate attribute ring wait bug when primitive ID is per-primitive.
...
There is a possibility that some waves in an NGG workgroup
don't have any input vertices, only primitives. When these
waves store the primitive ID as a per-primitive attribute,
they will need to wait for those stores before the primitive
export, because the other waves can't wait for them.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
397d45d055
ac/nir/ngg: Mitigate NGG fully culled bug when GS output is compile-time zero.
...
This case is unlikely but possible. We forgot to handle it here,
because it was originally handled by the backend compiler.
On GFX10 chips that have issues with 0 vertices and primitives
exported, this will always export at least 1 vertex and primitive.
This could theoretically fix some hangs on Navi 10, although we are not aware of a specific issue caused by this problem.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218 >
2025-01-30 15:26:45 +00:00
2b4c28e67c
ci/lima: enable again
...
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33299 >
2025-01-30 14:22:09 +00:00
18fb397249
ci/lima: update piglit ci expectations
...
Some regressions during lima lab downtime.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33299 >
2025-01-30 14:22:09 +00:00
cb71030387
mesa: enable GL_EXT_conservative_depth extension
...
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33065 >
2025-01-30 10:50:37 +00:00
b3e4a113b2
freedreno/ci: Document flakes
...
Some of these cause pipelines to fail.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33298 >
2025-01-30 10:25:05 +00:00
06ab1c81d1
amd/ci: Increase amd-raven-skqp parallelism
...
This job was taking too long and there's more DUTs in available in LAVA.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33298 >
2025-01-30 10:25:05 +00:00
676d4f83d4
virgl/ci: Skip flaky trace
...
This flake doesn't render at times and can fail merge pipelines.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33298 >
2025-01-30 10:25:05 +00:00
d8b7fbd4ac
ci: mark radv-raven-traces-restricted with allow_failure
...
restricted trace jobs are allowed to fail
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33244 >
2025-01-30 09:49:11 +00:00
d6f9c19755
radv/amdgpu: add support for AMDGPU_GEM_CREATE_GFX12_DCC
...
This flags will be used to set PTE.DCC to VRAM allocations
(ie. compression).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284 >
2025-01-30 08:18:22 +00:00
5ac72c5f56
ac/descriptors: allow to configure DCC for buffer descriptors
...
This is not used yet.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284 >
2025-01-30 08:18:22 +00:00
fe6494559d
ac,radeonsi: add SDMA DCC tiling for GFX12+
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33284 >
2025-01-30 08:18:22 +00:00
e639cd768d
glsl: fix return value for subgroupBallot()
...
The original code attempted to create a second instance of the intrinsic
with only a different return value which isn't possible since the params
(in this case 0 params) are the same. To fix this were need to create
two differently named intrinsics.
Reviewed-by: Qiang Yu <yuq825@gmail.com >
Fixes: a496d84ac8https://gitlab.freedesktop.org/mesa/mesa/-/issues/12510
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33231 >
2025-01-30 06:06:32 +00:00
9102d1775d
docs: move cross c*_args from [properties] to [built-in options]
...
Fixes the following warnings:
DEPRECATION: c_args in the [properties] section of the machine file
is deprecated, use the [built-in options] section.
DEPRECATION: c_link_args in the [properties] section ...
DEPRECATION: cpp_args in the [properties] section ...
DEPRECATION: cpp_link_args in the [properties] section ...
These were moved in meson version 0.56.0:
https://mesonbuild.com/Machine-files.html#meson-builtin-options
https://mesonbuild.com/Release-notes-for-0-56-0.html
Mesa requires meson version 0.60 or above since commit 049086cd58tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31945 >
2025-01-30 05:13:29 +00:00
75fb91501e
docs: show which pkg-config Fedora uses for cross-compilation
...
Learned the hard way.
Only tested on Fedora but other RPM-based distros are likely to be the
same.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31945 >
2025-01-30 05:13:29 +00:00
0051807e7e
docs: show how to use ccache when cross-compiling
...
On my desktop system, this gets compilation of (a subset of) 32bits Mesa
from 2.5 minutes down to 15 seconds - and most of what left is linking.
Also show that absolute paths are not required.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31945 >
2025-01-30 05:13:29 +00:00
eaabf0e5f0
docs: cross-compile: add useful "apt" and "dnf" builddep commands
...
These have been tested only with x86_64->i686 cross-compilation but I
don't see why they couldn't work with other architectures if/when Linux
distributions support them. For at least x86_64->i686 cross-compilation,
these commands save an enormous amount of time.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31945 >
2025-01-30 05:13:29 +00:00
56081c0b22
docs: add "apt-get build-dep" and "dnf buildep"
...
So much easier and faster than installing every dependency one by one.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31945 >
2025-01-30 05:13:28 +00:00
f18dee3618
intel/brw: Fallback to SEND from SEND_GATHER if possible
...
After optimization happen, if the sources are still in one or two
contigous spans for some reason (e.g. some data read from memory
now being written), it is beneficial to just use regular SEND
and avoid having to set the ARF scalar instruction.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410 >
2025-01-30 04:43:58 +00:00
b6b32933ad
intel/brw: Use SHADER_OPCODE_SEND_GATHER in Xe3
...
Add an optimization pass to turn regular SENDs into SEND_GATHERs.
This allows the payload to be "broken" into smaller pieces that
can be further optimized, which _may_ result in
- less register pressure (no need to contiguous space), and
- less instructions (no need to MOV to such space).
For debugging, the INTEL_DEBUG=no-send-gather option skips this
optimization, and reporting how many opportunities were missed.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410 >
2025-01-30 04:43:58 +00:00
26d4d04d63
intel/brw: Add lowering for SHADER_OPCODE_SEND_GATHER
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410 >
2025-01-30 04:43:58 +00:00
Danylo Piliaiev