ac/nir/ngg: Remove gfx_level and family from NGG lowering options.

They can be read from radeon_info.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33218>
This commit is contained in:
Timur Kristóf
2025-01-27 12:44:42 +01:00
committed by Marge Bot
parent dc6ae1855a
commit b8204c8df9
3 changed files with 1 additions and 7 deletions
-2
View File
@@ -142,8 +142,6 @@ ac_nir_lower_indirect_derefs(nir_shader *shader,
enum amd_gfx_level gfx_level);
typedef struct {
enum radeon_family family;
enum amd_gfx_level gfx_level;
const struct radeon_info *hw_info;
unsigned max_workgroup_size;
+1 -3
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@@ -760,8 +760,6 @@ radv_lower_ngg(struct radv_device *device, struct radv_shader_stage *ngg_stage,
nir->info.shared_size = info->ngg_info.lds_size;
ac_nir_lower_ngg_options options = {0};
options.family = pdev->info.family;
options.gfx_level = pdev->info.gfx_level;
options.hw_info = &pdev->info;
options.max_workgroup_size = info->workgroup_size;
options.wave_size = info->wave_size;
@@ -804,7 +802,7 @@ radv_lower_ngg(struct radv_device *device, struct radv_shader_stage *ngg_stage,
unsigned hw_workgroup_size = ALIGN(info->workgroup_size, info->wave_size);
bool scratch_ring = false;
NIR_PASS_V(nir, ac_nir_lower_ngg_mesh, options.gfx_level, options.clip_cull_dist_mask,
NIR_PASS_V(nir, ac_nir_lower_ngg_mesh, pdev->info.gfx_level, options.clip_cull_dist_mask,
options.vs_output_param_offset, options.has_param_exports, &scratch_ring, info->wave_size,
hw_workgroup_size, gfx_state->has_multiview_view_index, info->ms.has_query, pdev->mesh_fast_launch_2);
ngg_stage->info.ms.needs_ms_scratch_ring = scratch_ring;
-2
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@@ -1815,8 +1815,6 @@ static void si_lower_ngg(struct si_shader *shader, nir_shader *nir)
sel->info.culldist_mask;
ac_nir_lower_ngg_options options = {
.family = sel->screen->info.family,
.gfx_level = sel->screen->info.gfx_level,
.hw_info = &sel->screen->info,
.max_workgroup_size = si_get_max_workgroup_size(shader),
.wave_size = shader->wave_size,