AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
109,653 Commits 1 Branch 0 Tags
d4e0fbc92fd08be504f328144c874da47b78e5dc
Commit Graph

109653 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Leo Liu d4e0fbc92f radeon/vcn/vp9: search the render target from the whole list 
The number of render targets could be more than max of references,
so we search the full list of the render pictures for the current
render target index

https://bugs.freedesktop.org/show_bug.cgi?id=109648

Signed-off-by: Leo Liu <leo.liu@amd.com>
Tested-by: James Zhu <James.Zhu@amd.com>
Acked-by: James Zhu<James.Zhu@amd.com>
Cc: <mesa-stable@lists.freedesktop.org>
 2019-04-01 08:59:38 -04:00
Rhys Perry 0af95f0ffc radv: lower 16-bit flrp 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-04-01 09:58:48 +02:00
Samuel Pitoiset 4d5fce29c3 ac: fix ac_build_umsb() for 16-bit integer type 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:56 +02:00
Samuel Pitoiset 7a088d1ac8 ac: fix ac_find_lsb() for 16-bit integer type 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:54 +02:00
Samuel Pitoiset b16dffff23 ac: fix ac_build_bitfield_reverse() for 16-bit integer type 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:52 +02:00
Samuel Pitoiset 9d13b9e53e ac: fix ac_build_bit_count() for 16-bit integer type 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:49 +02:00
Samuel Pitoiset e39a6b940f ac/nir: fix nir_op_b2i16 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:47 +02:00
Eric Engestrom aa7afe324c meson: strip rpath from megadrivers 
More specifically, use the library file that has been post-processed by Meson
when creating the hardlinks.

Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=108766
Fixes: 3218056e0e "meson: Build i965 and dri stack"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
 2019-04-01 07:04:13 +00:00
Tapani Pälli 06f40f5765 spirv: fix a compiler warning 
Fixes implicit conversion from enumeration type 'SpvOp' warning.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2019-04-01 07:43:10 +03:00
Lionel Landwerlin f0b472b301 i965: perf: update render basic configs for big core gen9/gen10 
This updates allows an MI_LRI to trigger a OA report write in the
global OA buffer. This isn't really useful for us, we just keep close
to the internal public configs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-04-01 00:59:31 +03:00
Lionel Landwerlin 052ace0c81 i965: perf: add ring busyness metric for cfl gt2 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-04-01 00:59:26 +03:00
Lionel Landwerlin 7e54857b4a i965: perf: enable Icelake metrics 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:36:37 +01:00
Lionel Landwerlin 897efc2059 i965: perf: add Icelake metrics 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:36:37 +01:00
Lionel Landwerlin b910e40956 i965: perf: sklgt2: drop programming of an unused NOA register 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:35:16 +01:00
Lionel Landwerlin 29ce64a77a i965: perf: hsw: drop register programming not needed on HSW 
This register is flagged as IVB only in the documentation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:35:16 +01:00
Lionel Landwerlin 46250d7dac i965: perf: chv: fixup counters names 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:35:16 +01:00
Lionel Landwerlin 046041b2a0 i965: perf: add PMA stall metrics 
These are new metrics for Gen8/9 to measure the effect of the PMA
stall workaround fix.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:35:16 +01:00
Lionel Landwerlin dc9e598f3c i965: perf: sklgt2: update memory write config 
This rework the programming between older pre-production steppings &
new ones.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:35:16 +01:00
Lionel Landwerlin 0d618bb635 i965: perf: sklgt2: update compute metrics config 
This unifies some of the programming between pre-production stepping
and production ones.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:35:16 +01:00
Lionel Landwerlin 4edaa6f003 i965: perf: sklgt2: update a priority for register programming 
This makes no difference in term of programming, it's just a cleanup.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-31 10:35:16 +01:00
Alyssa Rosenzweig e4e6a3deaf panfrost: Implement FIXED formats 
Fixes crash in dEQP-GLES2.functional.draw.random.9

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 04:42:37 +00:00
Alyssa Rosenzweig ed160a1160 panfrost: Fix index calculation types and asserts 
Fixes crash in
dEQP-GLES2.functional.draw.draw_elements.points.single_attribute.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 04:42:22 +00:00
Alyssa Rosenzweig 0e4c321c15 panfrost: Clean index state between indexed draws 
Fixes subsequent tests in
dEQP-GLES2.functional.draw.draw_elements.indices.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 04:41:54 +00:00
Alyssa Rosenzweig 4fcd3189ae panfrost/decode: Print negative_start 
This property slipped through..

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 04:41:06 +00:00
Alyssa Rosenzweig 9237204400 panfrost: Implement missing texture formats 
- Implements RGB565/RGBA5551 formats
 - Don't advertise support for flipped RGBA5551 and ETC

Fixes remaining tests in dEQP-GLES2.functional.texture.format.* which is
now at 36/36.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:38 +00:00
Alyssa Rosenzweig 01fce794dc panfrost: Extend tiling for cubemaps 
transfer_unmap now tiles for any tiled resource, not just TEXTURE_2D,
which should more than just cubemaps!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:38 +00:00
Alyssa Rosenzweig c87f3ce97f panfrost: Implement command stream for linear cubemaps 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:38 +00:00
Alyssa Rosenzweig 70b3e5db7d panfrost/midgard: Emit cubemap coordinates 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:38 +00:00
Alyssa Rosenzweig b5f02bdd99 panfrost: Include all cubemap faces in bitmap list 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:38 +00:00
Alyssa Rosenzweig 3197b30c6e panfrost/decode: Decode all cubemap faces 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:38 +00:00
Alyssa Rosenzweig e658f7225d panfrost: Preliminary work for cubemaps 
Again, not yet functional, but this sets up the memory management for
cube maps.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:37 +00:00
Alyssa Rosenzweig 499f31aab8 panfrost/midgard: Add L/S op for writing cubemap coordinates 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:37 +00:00
Alyssa Rosenzweig f67616ce60 panfrost/midgard: Disassemble cube texture op 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:37 +00:00
Alyssa Rosenzweig 28b234a092 panfrost: Fix vertex buffer corruption 
Fixes crash in dEQP-GLES2.functional.buffer.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2019-03-31 02:36:37 +00:00
Rob Clark b2d651b862 iris: fix set_sampler_view 
Update to match docs.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-30 13:05:31 -04:00
Rob Clark e167e8f8a2 gallium/docs: clarify set_sampler_views (v2) 
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-30 13:04:00 -04:00
Rob Clark 7ff6705b8d freedreno/ir3: convert to "new style" frag inputs 
Add support for load_barycentric_pixel, load_interpolated_input, and
friends.  For now, this retains support for old-style inputs, which can
probably be dropped with some ttn work.

Prep work for sample-shading support.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2019-03-30 12:56:01 -04:00
Rob Clark fc865de777 freedreno/ir3: add pass to move varying loads 
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2019-03-30 12:56:01 -04:00
Rob Clark 831f1a05c0 freedreno/ir3: rework varying packing 
Originally we kept track of a table of inputs.  But with new-style frag
inputs this becomes awkward.  Re-work it so that initially we assigned
un-packed varying locations, and then after the shader is compiled scan
to find actual used inputs, and re-pack.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2019-03-30 12:56:01 -04:00
Rob Clark 91a1354cd6 freedreno/ir3: re-indent comment 
Make it more clear that it applies to the following 'case' statements,
rather than the previous one.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2019-03-30 12:56:01 -04:00
Rob Clark 1ae0c030cb nir: add lower_all_io_to_elements 
I need this part of lower_all_io_to_temps but without the actual
lowering to temps part.

Signed-off-by: Rob Clark <robdclark@gmail.com>
 2019-03-30 12:56:01 -04:00
Rob Clark e5e67228f5 nir: print var name for load_interpolated_input too 
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
 2019-03-30 12:55:47 -04:00
Sergii Romantsov 72a921e12a i965,iris/blorp: do not blit 0-sizes 
Seems there is no sense in blitting 0-sized sources
or destinations.
Additionaly it may cause segfaults for i965.

v2: Function call replaced with inline check

v3: Added check to avoid devision by zero (L. Landwerlin)

v4: Added simillar check for Iris (L. Landwerlin)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110239
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2019-03-30 11:50:40 +00:00
Vinson Lee e757a2481f gallium: Fix autotools build with libxatracker.la. 
CXXLD    libxatracker.la
/usr/bin/ld: ../../../../src/gallium/auxiliary/.libs/libgallium.a(tgsi_to_nir.o): in function `ttn_finalize_nir':
src/gallium/auxiliary/nir/tgsi_to_nir.c:2111: undefined reference to `gl_nir_lower_samplers_as_deref'
/usr/bin/ld: src/gallium/auxiliary/nir/tgsi_to_nir.c:2113: undefined reference to `gl_nir_lower_samplers'

Fixes: 9a834447d6 ("tgsi_to_nir: Produce optimized NIR for a given pipe_screen.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109929
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
 2019-03-29 23:24:05 -07:00
Timur Kristóf 356ec7a219 gallium: fix autotools build of pipe_msm.la 
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Fixes: 9a834447d6 ("tgsi_to_nir: Produce optimized NIR for a given pipe_screen.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109929
 2019-03-29 23:12:40 -07:00
Jason Ekstrand 7dbd934e26 nir: Lock around validation fail shader dumping 
This prevents getting mixed-up results if a multi-threaded app has two
validation errors in different threads.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2019-03-29 21:57:51 -05:00
Brian Paul b8e077daee util: no-op __builtin_types_compatible_p() for non-GCC compilers 
__builtin_types_compatible_p() is GCC-specific and breaks the
MSVC build.

This intrinsic has been in u_vector_foreach() for a long time, but
that macro has only recently been used in code
(nir/nir_opt_comparison_pre.c) that's built with MSVC.

Fixes: 2cf59861a ("nir: Add partial redundancy elimination for compares")

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
 2019-03-29 15:33:43 -06:00
Caio Marcelo de Oliveira Filho 3b20ca34ae iris: Clean up compiler warnings about unused 
Removed a few unused variables and iris_getparam_boolean().
Kept 'name' around since there's a commented debug that make use of it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-03-29 12:07:26 -07:00
Eric Engestrom 8d9c2044a4 egl: hide entrypoints that shouldn't be exported when using glvnd 
From GLVND author:
> From a functional standpoint, exporting additional symbols doesn't
> really matter, since libglvnd will load the vendor libraries with
> RTLD_LOCAL.

Suggested-by: Kyle Brenneman <kbrenneman@nvidia.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Kyle Brenneman <kbrenneman@nvidia.com>
 2019-03-29 16:54:08 +00:00
Karol Herbst fea0caea2b nir/validate: validate that tex deref sources are actually derefs 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
 2019-03-29 16:03:22 +01:00