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Author SHA1 Message Date
Juan A. Suarez Romero d48b276acd broadcom/simulator: add helper to get stride alignment 
Some GPUs, like AMD, has specific stride align requirements in order to
display the content correctly.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37887>
 2025-10-28 11:03:55 +00:00
Juan A. Suarez Romero 5947eae0af v3d/simulator: create GEM BOs in GTT memory for AMD GPUs 
As the BOs created in GPU needs to be accessible from the simulator,
create them in GTT memory, with CPU access.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37887>
 2025-10-28 11:03:55 +00:00
Juan A. Suarez Romero 977d4f34dd vc4: set stride alignment when using simulator 
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37887>
 2025-10-28 11:03:55 +00:00
Juan A. Suarez Romero aec701d094 vc4/simulator: add helper to get stride alignment 
Some GPUs, like AMD, require specific stride alignment in order to
display the content correctly.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37887>
 2025-10-28 11:03:54 +00:00
Juan A. Suarez Romero 66d715bac3 vc4/simulator: create GEM BOs in GTT memory for AMD GPUs 
As the BOs created in GPU needs to be accessible from the simulator,
create them in GTT memory, with CPU access.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37887>
 2025-10-28 11:03:54 +00:00
Valentine Burley 84fa5ecff6 panvk/ci: Add an ANGLE job on G925 
Disable the max-fails feature in deqp-runner for this job, since it
aborts the run due to failures that don't occur otherwise.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38051>
 2025-10-28 10:09:28 +00:00
Valentine Burley 3e14c64b28 panvk/ci: Add a VKCTS job on G925 
This job runs on MT8196 Rauru Chromebooks.

Also remove the old G725 expectation files, as G725 is a smaller variant
of G925.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38051>
 2025-10-28 10:09:28 +00:00
Valentine Burley c4778f1d27 panfrost/ci: Drop redundant KERNEL_IMAGE_NAME for rock-5b 
This was already the default value.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38051>
 2025-10-28 10:09:28 +00:00
Valentine Burley 2bec7fb8c7 ci: Update linux-firmware version to pick up more ARM firmware 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38051>
 2025-10-28 10:09:28 +00:00
David Rosca 0977ca2854 radeonsi/vce: Don't check ref modification and marking flags 
The number of operations is now correctly set to 0 when needed.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38050>
 2025-10-28 09:43:26 +00:00
David Rosca 1232a7a754 frontends/va: Always reset H264 slice ref modification and marking count 
This way the driver doesn't need to check the flag.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38050>
 2025-10-28 09:43:26 +00:00
David Rosca b6a00adb41 radeonsi/vcn: Support H264 encode pic_order_cnt_type 1 
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38052>
 2025-10-28 09:14:24 +00:00
David Rosca 8c2de21090 frontends/va: Support H264 encode pic_order_cnt_type 1 
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38052>
 2025-10-28 09:14:24 +00:00
Benjamin Cheng cef8eff74d radv/video: Override H265 SPS unaligned resolutions 
VCN requires 64x16 alignment for HEVC. When the app requests non-aligned
resolutions, make up for it with conformance window cropping.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38061>
 2025-10-28 08:53:35 +00:00
Benjamin Cheng 84b6d8e0d7 radv/video: Override H265 SPS block size parameters 
VCN only supports this set of parameters.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38061>
 2025-10-28 08:53:35 +00:00
Yogesh Mohan Marimuthu 53b9389563 winsys/amdgpu: use correct vm_timeline_point for userq creation 
doorbell does not require va address mapping from userspace and hence
amdgpu_bo_va_op_common() function is not called and therefore doorbell
bo->vm_timeline_point is not updated. Currently to wait for all mappings
to be ready doorbell vm_timeline_point is used which is incorrect.

This patch updates vm_timeline_point to wait for all bos. The bos
can be real bo or slab bo. slab bo can be from old buffer and hence
there is a check to update vm_timeline_point to wait only if it is
new.

Reported-by: Zhang, ShanYi (Ken) <ShanYi.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38059>
 2025-10-28 07:23:43 +00:00
Samuel Pitoiset 45affb0e53 radv: advertise VK_EXT_shader_uniform_buffer_unsized_array 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38047>
 2025-10-28 07:55:40 +01:00
Aitor Camacho 66bc12a747 kk: Set drawID in root descriptor table 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38067>
 2025-10-28 01:38:34 +00:00
Arcady Goldmints-Orlov 9be352df12 kk: Enable VK_EXT_shader_atomic_float 
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38067>
 2025-10-28 01:38:34 +00:00
Arcady Goldmints-Orlov 53de36895c kk: enable shaderStencilExport 
This requires a small new NIR pass to force the stencil output to be unsigned.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38067>
 2025-10-28 01:38:34 +00:00
Arcady Goldmints-Orlov d3424de889 kk: enable shaderDrawParameters 
Currently draw_id is always 0 since we don't support multidraw yet.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38067>
 2025-10-28 01:38:34 +00:00
Arcady Goldmints-Orlov 8c9e9555e8 kk: enable logicOp 
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38067>
 2025-10-28 01:38:34 +00:00
Arcady Goldmints-Orlov 938390c075 kk: enable dualSrcBlend 
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38067>
 2025-10-28 01:38:34 +00:00
Faith Ekstrand a9e0adc679 nvk: Advertise VK_KHR_maintenance10 
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38094>
 2025-10-27 16:20:32 -04:00
Faith Ekstrand 268a1db7cc nvk: Advertise the new maintenance10 format features 
We don't actually advertise compute-only or depth-only queues right now
but nothing in the spec says you have to advertise the queues in order
to advertise the bits.  Setting them now ensures we don't forget them
when compute-only or transfer-only queues get added.

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38094>
 2025-10-27 16:19:43 -04:00
Faith Ekstrand 0a5a456259 nvk: Switch to CmdEndRendering2KHR() 
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38094>
 2025-10-27 16:19:43 -04:00
Faith Ekstrand 6e3eeb6118 nvk: Plumb attachment flags through to MSAA resolve 
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38094>
 2025-10-27 16:19:43 -04:00
Faith Ekstrand bbbf037303 vulkan/meta: Handle VkResolveImageModeInfoKHR 
This contains resolve modes which override the format-based defaults as
well as resolve flags to allow disabling sRGB conversion.

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38094>
 2025-10-27 16:19:43 -04:00
Faith Ekstrand b5d5836fd1 vulkan/meta: Handle VK_RENDERING_ATTACHMENT_RESOLVE_SKIP_TRANSFER_FUNCTION_BIT 
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38094>
 2025-10-27 16:19:43 -04:00
Faith Ekstrand 127de27015 vulkan/util: Add a vk_format_srgb_to_linear() helper 
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38094>
 2025-10-27 16:19:43 -04:00
Lionel Landwerlin 3955787ab2 anv: implement VK_KHR_maintenance10 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38045>
 2025-10-27 19:20:09 +00:00
Lionel Landwerlin cf81feb660 vulkan/render_pass: handle maintenance10 resolve flags 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38045>
 2025-10-27 19:20:09 +00:00
Lionel Landwerlin c5740c2548 vulkan/render_pass: Add a missing sType 
Fixes: 3a204d5cf3 ("vulkan/render_pass: Add a better helper for render pass inheritance")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38045>
 2025-10-27 19:20:09 +00:00
Lionel Landwerlin 2899cd84e4 vulkan/runtime: enable null pointer to vkCmdSetSampleMaskEXT() 
For VK_KHR_maintenance10

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38045>
 2025-10-27 19:20:08 +00:00
Tim Van Patten 2bb7c1e459 docs/envvars: Add section: Android System Properties 
Add documentation describing Android system property usage in Mesa. For
example, how environment varible names are translated by
os_get_option(), how to get/set values, and corresponding example
commands.

A new section is added to doc/envvars.rst which points to the full
details within the new "Android System Properties" section in
docs/android.rst.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37942>
 2025-10-27 19:15:19 +00:00
Marek Olšák 41a8c4d37c zink: fix mesh and task shader pipeline statistics 
Fixes: 9d0e73335a - zink: enable GL_EXT_mesh_shader
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38086>
 2025-10-27 18:45:28 +00:00
Job Noorman c544f42a79 ir3/ra: reset merge set preferred reg when unavailable 
When a reg's merge set has a preferred reg but is currently unavailable,
it's often preferable to reset its preferred reg and assign a new one,
as this potentially reduces the number of movs needed for the as of yet
unallocated regs.

Totals from 18278 (11.10% of 164705) affected shaders:
Instrs: 14380961 -> 14340094 (-0.28%); split: -0.58%, +0.29%
CodeSize: 28522270 -> 28460942 (-0.22%); split: -0.44%, +0.23%
NOPs: 2771602 -> 2759456 (-0.44%); split: -1.17%, +0.73%
MOVs: 589951 -> 577832 (-2.05%); split: -6.63%, +4.57%
COVs: 233094 -> 232938 (-0.07%); split: -0.11%, +0.05%
Full: 276629 -> 276632 (+0.00%); split: -0.00%, +0.00%
(ss): 364508 -> 365702 (+0.33%); split: -0.73%, +1.06%
(sy): 177032 -> 176310 (-0.41%); split: -0.98%, +0.57%
(ss)-stall: 1512210 -> 1512312 (+0.01%); split: -0.92%, +0.93%
(sy)-stall: 5783986 -> 5723012 (-1.05%); split: -1.93%, +0.88%
Preamble Instrs: 2905654 -> 2904919 (-0.03%); split: -0.09%, +0.07%
Last helper: 3397081 -> 3390054 (-0.21%); split: -0.57%, +0.36%
Last baryf: 136198 -> 136439 (+0.18%); split: -0.07%, +0.25%
Cat0: 3061954 -> 3051187 (-0.35%); split: -1.11%, +0.76%
Cat1: 874681 -> 843044 (-3.62%); split: -6.57%, +2.96%
Cat2: 5226994 -> 5226663 (-0.01%); split: -0.01%, +0.00%
Cat7: 357258 -> 359126 (+0.52%); split: -0.33%, +0.85%

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37811>
 2025-10-27 18:22:58 +00:00
Connor Abbott f58b24467a tu: Zero MSRTSS temporary image before creating it 
In the dynamic rendering case, the images are allocated statically out
of the command buffer and may be reused, so we have to make they are
zeroed to match the normal tu_CreateImage() path. Otherwise we may get
garbage from previous usages of the image.

Fixes: f6c7f16322 ("tu: Implement VK_EXT_multisampled_render_to_single_sampled")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38032>
 2025-10-27 17:56:02 +00:00
Connor Abbott c0b5c04b84 tu: Fix attachment stores with subpasses with partial views 
Subpasses can have different view masks, although this isn't often used.
So we can't use the view mask of the last subpass when deciding what to
store, instead we have to use the same used_views field that's used by
loads and clears.

Noticed by upcoming tests for VK_QCOM_multiview_per_view_render_areas.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38064>
 2025-10-27 17:31:43 +00:00
Connor Abbott 6c3ed74ed2 tu: Rename tu_render_pass_attachment::clear_views to used_views 
It's not just used for clears, it was already used for loads and it
needs to be used for stores too so clear_views was a confusing name.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38064>
 2025-10-27 17:31:42 +00:00
Valentine Burley 45a762727c venus/ci: Skip slow test on ANV with Cuttlefish 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38080>
 2025-10-27 15:50:15 +01:00
Faith Ekstrand b407fef097 Update the Vulkan-profiles wrap to 1.4.330 and re-enable zink_check_requirements 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14176
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38080>
 2025-10-27 10:04:48 -04:00
Mike Blumenkrantz a2ef369abf zink: disable primitiveFragmentShadingRateMeshShader feature 
features are auto-enabled, but some of them cause validation errors
which are simple to work around

Fixes: 90f3c57337 ("zink: hook up VK_EXT_mesh_shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38077>
 2025-10-27 09:07:37 -04:00
Mario Kleiner 3ca1cee8b0 hk: Enable VK_KHR_present_id[2] and VK_KHR_present_wait[2] 
These extensions are implemented in shared Vulkan/WSI code and
not driver specific. A Vulkan driver just needs to support
VK_KHR_timeline_semaphore, which Honeykrisp already supports
since its inclusion into Mesa.

Successfully tested on Apple MacBookAir 2020 with M1 SoC on
top of KDE KWin 6.4 and GNOME mutter 48.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38069>
 2025-10-27 12:27:23 +00:00
Danylo Piliaiev d1fe9a152e tu/lrz: Disable LRZ writes when draw doesn't write to all attachments 
Not writing to color attachments in the same as blending from LRZ
viewpoint.

Though there is one case when we can avoid disabling LRZ writes,
when a renderpass starts with depth-only draw calls, or consists entirely
of them, but also has color attachments.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38034>
 2025-10-27 11:14:31 +00:00
Danylo Piliaiev 7ee9835475 tu/lrz: Disable LRZ when CmdSetRenderingAttachmentLocations is used 
Same case as a drawcall not writing to some color attachments, but not
trying to make LRZ work in cases where we can prove that LRZ can work.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38034>
 2025-10-27 11:14:30 +00:00
Danylo Piliaiev 31cb49d6cb tu/lrz: Fold disable_write_for_rp check into tu_lrz_disable_write_for_rp 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38034>
 2025-10-27 11:14:29 +00:00
Lionel Landwerlin f6f2a73bbc anv: expose VK_EXT_shader_uniform_buffer_unsized_array 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38046>
 2025-10-27 10:01:48 +00:00
Job Noorman f84d85790e ir3/ra: fix assert during file start reset 
While accounting for an input register's merge set when resetting the
file start after the preamble, we implicitly assume that the allocated
register is the preferred one by asserting that the register's merge set
offset is not smaller than its physreg (to prevent an underflow).
However, inputs are not guaranteed to have their preferred register
allocated which causes the assert to get triggered.

Fix this by only taking the whole merge set into account for inputs that
actually got their preferred register allocated.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: 9d4ba885bb ("ir3/ra: make main shader reg select independent of preamble")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37905>
 2025-10-27 09:32:51 +00:00
Valentine Burley b6e281d0b1 zink/ci: Document ANV flake 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37935>
 2025-10-27 08:51:04 +00:00