Commit Graph

210002 Commits

Author SHA1 Message Date
Lionel Landwerlin c8305dfe0e anv: move SBE emission to dynamic path
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
2025-08-08 14:07:00 +00:00
Lionel Landwerlin 33abaf2d0e anv: simplify SBE emission
Using 3DSTATE_SBE_SWIZ for providing the implicit PrimitiveID value
(when not written by the previous stage) seems to be the legacy way of
doing things on Gfx7 and prior.

On Gfx8+ we got this new
3DSTATE_SBE::PrimitiveIDOverrideAttributeSelect to get the HW to write
the value wherever we want.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
2025-08-08 14:06:59 +00:00
Lionel Landwerlin 7b8a6af222 anv: move 3DSTATE_SF dynamic emission path
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
2025-08-08 14:06:59 +00:00
Lionel Landwerlin 20721419e5 anv: move primitive_replication emission to dynamic path
The pipeline object going away, we won't have a place to keep this. We
can make the diff/emission efficient enough that it won't matter much.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
2025-08-08 14:06:58 +00:00
Lionel Landwerlin 6d863fda2d anv/brw: move sample_shading_enable to wm_prog_data
The vulkan runtime doesn´t store this parameter in the dynamic state
(since it's not a dynamic state). Just capture it at compile time and
leave on the wm_prog_data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
2025-08-08 14:06:58 +00:00
Lionel Landwerlin f2696b441d anv/brw: store min_sample_shading on wm_prog_data
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
2025-08-08 14:06:57 +00:00
Julia Zhang 3fa212c4f5 virgl: Small fix of converting format
Convert pipe format to virgl format since virglrenderer will convert it
back from virgl format to pip format when create pipe_resource.

According to the call stack, only if vflags include flag:
PIPE_RESOURCE_FLAG_MAP_PERSISTENT or PIPE_RESOURCE_FLAG_MAP_COHERENT
will make it call into virgl_drm_winsys_resource_create_blob() so here
remove redundant if condition in virgl_drm_winsys_resource_create_blob().

Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36672>
2025-08-08 13:47:03 +00:00
Rob Clark a8b27a125b drm/drm-shim: Add a702
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36644>
2025-08-08 13:04:35 +00:00
Rob Clark 69f9a805ae freedreno/drm-shim: Fix nr_rings/priorities
Since drm/sched conversion, the kernel will report at least 3.  And
rusticl seems to depend on this.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36644>
2025-08-08 13:04:35 +00:00
Lionel Landwerlin 652ef8f0c5 anv: fix source hash utrace prints
Right now we're just printing 0 values

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8966088cc5 ("anv: store gfx/compute bound shaders on command buffer state")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36663>
2025-08-08 12:10:21 +00:00
Samuel Pitoiset a520f75229 radv: move tracked registers to radv_cmd_stream
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:24 +00:00
Samuel Pitoiset e2def79e2a radv: move context_roll_without_scissor_emitted to radv_cmd_stream
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:24 +00:00
Samuel Pitoiset cc85f33b57 radv: move buffered registers for GFX12 to radv_cmd_stream
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:23 +00:00
Samuel Pitoiset 3ccb48ec46 radv: switch to radv_cmd_stream everywhere
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:23 +00:00
Samuel Pitoiset 5982e8f331 radv: introduce radv_cmd_stream
radeon_cmdbuf is too low level for stuff like tracked registers and
buffered registers on GFX11+.

This commit introduces radv_cmd_stream which is defined like:

struct radv_cmd_stream {
   struct radeon_cmdbuf *b;
   // TODO: add tracked regs
   // TODO: add buffered regs
};

It will be much easier/cleaner to implement tracked/buffered registers
with this new structure.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:23 +00:00
Samuel Pitoiset 8078acc205 radv: tidy up radv_device_init_perf_counters()
radeon_winsys_cs is just a relic at this point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:22 +00:00
Hyunjun Ko b133855c40 anv/video: add VK_VIDEO_ENCODE_H265_CTB_SIZE_32_BIT_KHR for minimum ctb sizes
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36211>
2025-08-08 11:26:15 +00:00
Hyunjun Ko 0453eb0c4b anv/video: create Motion Vector buffers for encoding too
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36211>
2025-08-08 11:26:15 +00:00
Hyunjun Ko 090d7e6582 anv/video: don't set the MVDL1Zero for encoding
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36211>
2025-08-08 11:26:15 +00:00
Hyunjun Ko 68e862fe51 anv/video: set short term ref list1 even if P frames provided
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36211>
2025-08-08 11:26:15 +00:00
Hyunjun Ko c55366682c anv/genxml: the type of POC delta changes correctly
It should be between -16 and 16

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36211>
2025-08-08 11:26:14 +00:00
Hyunjun Ko 5f6aa3d297 anv/video: fix to set some attributes for HCP_PIC_STATE.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36211>
2025-08-08 11:26:14 +00:00
Hyunjun Ko 609ef617c9 vulkan/video: align with spec correctly for h265 slice header.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36211>
2025-08-08 11:26:13 +00:00
Emma Anholt 99f09f8047 Revert "tu: Use nir_opt_reassociate."
This reverts commit 3735ac6165.  It
regressed rendering on a few D3D11 traces we have, and I won't have time
to debug before going camping for a few days.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36657>
2025-08-08 11:10:16 +00:00
Karol Herbst 9d8c95f8d3 zink: fix data race in descriptor_util_pool_key_get
Two threads could end up creating a pool_key for the same hash and end up
overwriting the earlier one.

Fixes flaky image kernel_read_write CL CTS tests.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36652>
2025-08-08 10:26:52 +00:00
Karol Herbst fe09dfbcf3 vulkan: use p_atomic_read on vk_descriptor_set_layout::ref_cnt
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36652>
2025-08-08 10:26:52 +00:00
Alyssa Rosenzweig 5b6ad73ac7 hk: reduce storage desc
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36633>
2025-08-08 10:10:58 +00:00
Alyssa Rosenzweig 9aad6f005d hk: drop unused
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36633>
2025-08-08 10:10:58 +00:00
Alyssa Rosenzweig ba00c87fdf hk: fix pathological RAM use for tess emulation
These * 32's got added when debugging this I guess and I never took them out.
Ouchie. Reduces memory footprint of tess by 32x. Geez.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36633>
2025-08-08 10:10:58 +00:00
Alyssa Rosenzweig 7eb7db3613 hk: clarify command pool types
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36633>
2025-08-08 10:10:58 +00:00
Alyssa Rosenzweig e9bf1c59ed hk: fix todo
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36633>
2025-08-08 10:10:58 +00:00
Alyssa Rosenzweig 1ef97241d7 asahi: reduce ppp alignment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36633>
2025-08-08 10:10:58 +00:00
Alyssa Rosenzweig 7297a699f7 asahi: clang-format
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36633>
2025-08-08 10:10:57 +00:00
David Rosca 9491ea761f radv/video: Use more common defines
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:54 +00:00
David Rosca d1165984e9 ac/vcn_dec: Add RDECODE_IT_SCALING_TABLE_SIZE
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:54 +00:00
David Rosca 532eb40404 radv/video: Remove unused enum
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:54 +00:00
David Rosca c904796350 radv/video: Simplify vp9 q params
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:53 +00:00
David Rosca 27dec41c81 radv/video: Don't init vp9 probs table in message buffer
This is needed in context buffer, but message buffer only uses the
segmentation data.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:53 +00:00
David Rosca 142d54817a radv: Add timeout to video encode query
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:52 +00:00
Lionel Landwerlin 4c65aef155 brw: implement ACCESS_COHERENT on Gfx12.5+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36595>
2025-08-08 08:44:22 +00:00
Samuel Pitoiset 2e51b50db2 radv: regroup CB related states emission together
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:26 +00:00
Samuel Pitoiset fa677ca0c3 radv: track more CB related context registers on < GFX12
The tracked registers mechanism isn't used yet on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:25 +00:00
Samuel Pitoiset 6a170c5de1 radv: precompute color blend equations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:25 +00:00
Samuel Pitoiset 52589ed1e9 radv: precompute the mask for color write attachments
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:25 +00:00
Samuel Pitoiset 43cc048deb radv: precompute the mask for enabled color writes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:24 +00:00
Valentine Burley d2a1acaa2c zink/ci: Document flakes on ANV
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36662>
2025-08-08 09:54:12 +02:00
Valentine Burley b2eba071c5 zink/ci: Skip flaky tests on CML due to HW deficiency
This is a known hardware limitation on Gfx9 that can cause intermittent
failures. See https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36348#note_3037412.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36662>
2025-08-08 09:02:28 +02:00
Yonggang Luo 723eeac89b util: Refactoring util_dl_get_path_from_proc out of clc/clc_helpers.cpp
For getting clc_helpers.cpp can be compiled with gcc/mingw

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36597>
2025-08-07 21:15:13 +00:00
Konstantin Seurer 38db7119cc lavapipe: Mask invalid shader stage flags
lvp_execute.c iterates over all set bits which can cause oob access.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13512
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36371>
2025-08-07 20:46:24 +00:00
Konstantin Seurer fe4c3dcab8 vulkan: Add MESA_VK_SHADER_STAGE_ALL
For masking invalid bits.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36371>
2025-08-07 20:46:24 +00:00