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Author SHA1 Message Date
Rob Clark
c4ea8375c4 ir3: Don't count images in num_samp 
The new style reg packers noticed us overflowing SP_xS_CONFIG.num_samp.
Even if we lower image loads to isam, they are using the bindless
descriptors, so no reason to count them here.  Fixes:

  spec@arb_shader_image_load_store@max-images

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:59 +00:00
Rob Clark
4fe255b14d freedreno/a6xx: Rename compute state to cp 
So it doesn't conflict with the new cs builders.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:59 +00:00
Rob Clark
3864d1c209 freedreno/a6xx: Remove compute state user_consts_cmdstream_size 
Unused.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
946bfed6fe freedreno/a6xx: Add new cmdstream builders 
Add new cmdstream builders, including a specialized builder for
CP_CONTEXT_REG_BUNCH.

CRB provides more flexibility than the OUT_REG() pkt4 builder, in not
requiring registers to have consecutive offsets, and faster than
multiple individual pkt4's.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
3b6bf3e3f3 freedreno/a6xx: Make __assert_eq() a nop if !NDEBUG 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
c1aaef71da freedreno/a6xx: Make tex/samp descriptors a normal BO 
This way the descriptor upload is simply memcpy().

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
b17c34326d freedreno/a6xx: Make samp descriptor an array 
So that we can use plain memcpy in the next patch.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
49e5d83d31 freedreno/a6xx: Bake iova's into descriptors 
a6xx+ has long since used FD_BO_NO_HARDPIN, with BO tracking integrated
with resource tracking.  So we don't really need OUT_RELOC() for
building texture descriptors.  We had already dropped that for UVA
descriptors, now cleanup tex descriptors to match.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
dec7022d1a freedreno/a6xx: Separate out blit setup 
With the upcoming NCRB conversion, it is easier if all the setup reg
writes happen in their own scope, so the NCRB builder goes out of scope
and flushes the packet(s).  So re-arrange things a bit so we don't have
to add artificial {}'s

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
5dce5891d2 freedreno/a6xx: Drop orval/shift 
These where always zero for a6xx, and not really supported by the reg
packers.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
2a7f70f697 freedreno: Drop unused emit_const_asserts() param 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
5635f2769f freedreno/registers: Fix RB_A2D_DEST_FLAG_BUFFER_PITCH 
We were using the old-style RB_COLOR_FLAG_BUFFER_PITCH builders for
this.  The new cs builders don't allow that slop.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
a22391632a freedreno/registers: Fix SP_CS_PVT_MEM_BASE type 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
ac5b9f7cd0 freedreno/registers: Rename NCRB 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
fc61827688 freedreno/registers: Add some reg64 to pm4 
Some pm4 packets still describe 64b addresses as _HI and _LO reg32.
We'll need the reg64 type="address" (or "waddress") definitions in
order to emit these packets via fd_reg_pair with the new cs builders.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
fa8e84a175 freedreno/registers: Fix array reg names 
We shouldn't suffix them with the array index, as that is redundant with
<array/> descriptions.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:58 +00:00
Rob Clark
2cc3e1b9ae freedreno/drm: Expose attach_ring() 
This will fit in better with the upcoming new cs builders.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:57 +00:00
Rob Clark
290f1dd72c freedreno/drm: Split emit/attach obj/nonobj 
Streamline things a bit by having specialized variants to plug into the
vtable.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:57 +00:00
Rob Clark
1f13dfd1d7 freedreno/drm: Split out sp_attach_ring() 
Split the attach and emit, to prepare for exposing attach_ring() in the
drm interface.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:57 +00:00
Rob Clark
54dda2c9f8 freedreno/drm: Rename emit_bo 
It doesn't acctually emit anything, only attaches for the purposes of BO
tracking.  Rename to reflect this.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:57 +00:00
Rob Clark
50921081c0 freedreno: Add debug option to crash on context fault 
Makes debugging easier.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:57 +00:00
Rob Clark
f10217a6a3 freedreno: Remove obsolete comment 
This hasn't been quite true for quite a while.

Fixes: 78c8a8af80 ("freedreno: Generate device-info tables at build time")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
 2025-08-06 12:24:57 +00:00
Eric Engestrom
e9292306dc ci-tron: move vkd3d shader cache out of $CI_PROJECT_DIR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36551>
 2025-08-06 11:25:30 +00:00
Eric Engestrom
1588708987 ci-tron: move vkcts shader cache out of $CI_PROJECT_DIR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36551>
 2025-08-06 11:25:30 +00:00
Eric Engestrom
ccea6ebd0b ci-tron: keep *.qpa in job artifacts 
These are the `dEQP-$API.info.qpa` generated by deqp-runner and they can be
very useful when trying to figure out why deqp-runner is not starting.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36551>
 2025-08-06 11:25:28 +00:00
Alyssa Rosenzweig
20dab5f819 asahi: enable virtgpu support 
this updates our virtgpu support to match the upstream protocol, and enables. it
is marked for backport since the older Mesa releases already had virtgpu
support, just gated off to allow for breaking wire protocol changes (of which
there was 1 at the last moment).

Upstream virglrenderer MR assigned to marge:
https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1541

Backport-to: 25.1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36580>
 2025-08-06 11:11:06 +00:00
Hans-Kristian Arntzen
d7b17d4d9c ac/nir: Avoid 0/0 when computing texel buffer size on Polaris. 
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13349
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36571>
 2025-08-06 10:37:50 +00:00
Eric Engestrom
7f5d1b1350 zink+nvk/ci: give piglit tests a display to use 
The run time has not changed, it's still 22 min for ad106 and 22.5 min
for ga106.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36574>
 2025-08-06 10:16:23 +00:00
Eric Engestrom
159a92947a zink+nvk/ci: sort ad106 fails 
This is only moving the lines, no contents change other than adding
newlines between groups.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36574>
 2025-08-06 10:16:23 +00:00
Rhys Perry
08f088479a aco/ra: set late-kill for operands of temporary p_create_vector 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13543
Fixes: c279dd6e61 ("aco: Support vector-aligned ops fixed to defs")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36469>
 2025-08-06 09:44:01 +00:00
Daniel Schürmann
d3743dd7ba aco/scheduler: improve scheduling heuristic 
The heuristic we are currently using still stems from the GCN era
with the only adjustments being made for RDNA was to double (or triple)
the wave count.

This rewrite aims to detangle some concepts and provide more consistent results.

 - wave_factor: The purpose of this value is to reflect that RDNA SIMDs can
                accomodate twice as many waves as GCN SIMDs.
 - reg_file_multiple: This value accounts for the larger register file of wave32
                      and some RDNA3 families.
 - wave_minimum: Below this value, we don't sacrifice any waves. It corresponds
                 to a register demand of 64 VGPRs in wave64.
 - occupancy_factor: Depending on target_waves and wave_factor, this controls
                     the scheduling window sizes and number of moves.

The main differences from the previous heuristic is a lower wave minimum and
a slightly less aggressive reduction of waves.
It also increases SMEM_MAX_MOVES in order to mitigate some of the changes
from targeting less waves.

Totals from 62777 (78.63% of 79839) affected shaders: (Navi48)
MaxWaves: 1880983 -> 1848028 (-1.75%); split: +0.01%, -1.76%
Instrs: 40904711 -> 40800797 (-0.25%); split: -0.39%, +0.14%
CodeSize: 217132208 -> 216748832 (-0.18%); split: -0.29%, +0.12%
VGPRs: 3019304 -> 3099596 (+2.66%); split: -0.11%, +2.77%
Latency: 268857129 -> 265951122 (-1.08%); split: -1.33%, +0.25%
InvThroughput: 40960938 -> 41044533 (+0.20%); split: -0.18%, +0.39%
VClause: 794000 -> 782913 (-1.40%); split: -2.24%, +0.84%
SClause: 1192476 -> 1150831 (-3.49%); split: -3.94%, +0.45%
Copies: 2720470 -> 2700148 (-0.75%); split: -1.84%, +1.09%
Branches: 785926 -> 785951 (+0.00%); split: -0.01%, +0.01%
VALU: 22918411 -> 22890189 (-0.12%); split: -0.19%, +0.06%
SALU: 5281201 -> 5289486 (+0.16%); split: -0.21%, +0.36%
VOPD: 8790 -> 8685 (-1.19%); split: +1.08%, -2.28%

Totals from 62081 (77.77% of 79825) affected shaders: (Navi31)
MaxWaves: 1848555 -> 1812347 (-1.96%); split: +0.01%, -1.97%
Instrs: 39794460 -> 39704180 (-0.23%); split: -0.39%, +0.16%
CodeSize: 208987052 -> 208621524 (-0.17%); split: -0.31%, +0.13%
VGPRs: 3046284 -> 3135156 (+2.92%); split: -0.11%, +3.03%
Latency: 268863465 -> 265218186 (-1.36%); split: -1.59%, +0.23%
InvThroughput: 41101515 -> 41167075 (+0.16%); split: -0.22%, +0.38%
VClause: 795316 -> 774899 (-2.57%); split: -3.17%, +0.61%
SClause: 1177294 -> 1135451 (-3.55%); split: -4.06%, +0.51%
Copies: 2743254 -> 2725127 (-0.66%); split: -1.90%, +1.24%
Branches: 801395 -> 801428 (+0.00%); split: -0.01%, +0.02%
VALU: 23898938 -> 23871294 (-0.12%); split: -0.20%, +0.08%
SALU: 3908807 -> 3919130 (+0.26%); split: -0.23%, +0.50%
VOPD: 8529 -> 8500 (-0.34%); split: +1.29%, -1.63%

Totals from 44996 (71.01% of 63370) affected shaders: (Vega10)

MaxWaves: 307074 -> 304808 (-0.74%); split: +0.63%, -1.37%
Instrs: 22743534 -> 22716240 (-0.12%); split: -0.22%, +0.10%
CodeSize: 117284856 -> 117173212 (-0.10%); split: -0.19%, +0.09%
SGPRs: 3249008 -> 3330480 (+2.51%); split: -0.36%, +2.87%
VGPRs: 1901400 -> 1943880 (+2.23%); split: -0.60%, +2.83%
Latency: 224839126 -> 222878477 (-0.87%); split: -1.19%, +0.31%
InvThroughput: 114389570 -> 114316559 (-0.06%); split: -0.17%, +0.11%
VClause: 482012 -> 473304 (-1.81%); split: -2.86%, +1.05%
SClause: 757799 -> 717092 (-5.37%); split: -5.64%, +0.27%
Copies: 2182735 -> 2183598 (+0.04%); split: -1.17%, +1.21%
Branches: 396026 -> 395996 (-0.01%); split: -0.03%, +0.02%
VALU: 16740283 -> 16728098 (-0.07%); split: -0.14%, +0.07%
SALU: 2133575 -> 2145863 (+0.58%); split: -0.29%, +0.86%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30720>
 2025-08-06 09:16:33 +00:00
Yurii Kolesnykov
f292faebd7 Guard call to free_zombie_glx_drawable with condition from its definition 
Signed-off-by: Yurii Kolesnykov <root@yurikoles.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13589
Fixes: ad9db6b259 ("glx: Free all populated fields of the glx_display on creation failure")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36495>
 2025-08-06 08:46:52 +00:00
Christoph Neuhauser
acbb2d018c egl: Fix DRI utility function compilation on macOS 
Signed-off-by: Christoph Neuhauser <christoph.neuhauser@intel.com>
Tested-by: Yurii Kolesnykov <root@yurikoles.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13556
Fixes: e99446fc5e ("egl: Add EGL_EXT_device_query_name and EGL_EXT_device_persistent_id")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36495>
 2025-08-06 08:46:52 +00:00
Yurii Kolesnykov
bdb9b50dc4 Guard double include of libdrm.h by defining LIBDRM_H 
Signed-off-by: Yurii Kolesnykov <root@yurikoles.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Fixes: 4be68b119e ("loader: Don't load nouveau GL on nvidia kmd")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36495>
 2025-08-06 08:46:52 +00:00
Valentine Burley
27c8209ed4 ci: Remove xvfb from test-base container 
Xvfb is no longer used.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36567>
 2025-08-06 07:33:32 +00:00
Valentine Burley
d5c413a30d virgl/ci: Use Weston's Xwayland instead of Xvfb 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Acked-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36567>
 2025-08-06 07:33:32 +00:00
Valentine Burley
cb0315bcd7 softpipe/ci: Use Weston's Xwayland instead of Xvfb 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36567>
 2025-08-06 07:33:32 +00:00
Valentine Burley
5742f6f2db zink/ci: Use Weston's Xwayland instead of Xvfb 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36567>
 2025-08-06 07:33:32 +00:00
Valentine Burley
a08d8b4640 ci: Drop obsolete EGL skips 
These tests either pass now or are correctly skipped as not supported.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36445>
 2025-08-06 06:21:51 +00:00
Samuel Pitoiset
1f490c836b ac/gpu_info,radv: use the maximum virtual address from the kernel 
Instead of hardcoding it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36573>
 2025-08-06 07:55:38 +02:00
Qiang Yu
b22806705c compiler,gallium: remove PIPE_SHADER_* and adjust some macro usage 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
c135ed1eb9 all: rename gl_shader_stage_name to mesa_shader_stage_name 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
e0397b1ee0 all: rename gl_shader_stage_can_set_fragment_shading_rate 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
260bdad074 all: rename gl_shader_stage_is_rt to mesa_shader_stage_is_rt 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
807d693421 compiler: rename gl_shader_stage_is_callable to mesa_shader_stage_is_callable 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
4847e0b380 all: rename gl_shader_stage_uses_workgroup to mesa_shader_stage_uses_workgroup 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
4ff341f2fc compiler: remove gl_shader_stage_is_graphics 
It's not used by anyone.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
b27c8c9eb8 all: rename gl_shader_stage_is_mesh to mesa_shader_stage_is_mesh 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
7a91473192 all: rename gl_shader_stage_is_compute to mesa_shader_stage_is_compute 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:41 +08:00
Qiang Yu
e2b747a85b mesa,gallium: remove pipe_shader_type_from_mesa 
It's not needed as we unify pipe_shader_type and
mesa_shader_stage.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
 2025-08-06 10:28:40 +08:00