mesa,gallium: remove pipe_shader_type_from_mesa

It's not needed as we unify pipe_shader_type and
mesa_shader_stage.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
This commit is contained in:
Qiang Yu
2025-08-05 16:31:06 +08:00
parent f972e76148
commit e2b747a85b
13 changed files with 35 additions and 52 deletions
+6 -6
View File
@@ -3296,7 +3296,7 @@ ntt_should_vectorize_io(unsigned align, unsigned bit_size,
static nir_variable_mode
ntt_no_indirects_mask(nir_shader *s, struct pipe_screen *screen)
{
unsigned pipe_stage = pipe_shader_type_from_mesa(s->info.stage);
unsigned pipe_stage = s->info.stage;
unsigned indirect_mask = 0;
if (!(s->options->support_indirect_inputs & BITFIELD_BIT(pipe_stage))) {
@@ -3319,7 +3319,7 @@ ntt_optimize_nir(struct nir_shader *s, struct pipe_screen *screen,
const struct nir_to_tgsi_options *options)
{
bool progress;
unsigned pipe_stage = pipe_shader_type_from_mesa(s->info.stage);
unsigned pipe_stage = s->info.stage;
unsigned control_flow_depth =
screen->shader_caps[pipe_stage].max_control_flow_depth;
do {
@@ -3683,7 +3683,7 @@ ntt_fix_nir_options(struct pipe_screen *screen, struct nir_shader *s,
{
const struct nir_shader_compiler_options *options = s->options;
bool lower_fsqrt =
!screen->shader_caps[pipe_shader_type_from_mesa(s->info.stage)].tgsi_sqrt_supported;
!screen->shader_caps[s->info.stage].tgsi_sqrt_supported;
bool force_indirect_unrolling_sampler =
screen->caps.glsl_feature_level < 400;
@@ -3888,7 +3888,7 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
struct ntt_compile *c;
const void *tgsi_tokens;
nir_variable_mode no_indirects_mask = ntt_no_indirects_mask(s, screen);
bool native_integers = screen->shader_caps[pipe_shader_type_from_mesa(s->info.stage)].integers;
bool native_integers = screen->shader_caps[s->info.stage].integers;
const struct nir_shader_compiler_options *original_options = s->options;
ntt_fix_nir_options(screen, s, options);
@@ -3970,7 +3970,7 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
NIR_PASS(_, s, nir_opt_combine_barriers, NULL, NULL);
if (screen->shader_caps[pipe_shader_type_from_mesa(s->info.stage)].integers) {
if (screen->shader_caps[s->info.stage].integers) {
NIR_PASS(_, s, nir_lower_bool_to_int32);
} else {
NIR_PASS(_, s, nir_lower_int_to_float);
@@ -4014,7 +4014,7 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
c->s = s;
c->native_integers = native_integers;
c->ureg = ureg_create(pipe_shader_type_from_mesa(s->info.stage));
c->ureg = ureg_create(s->info.stage);
ureg_setup_shader_info(c->ureg, &s->info);
if (s->info.use_legacy_math_rules && screen->caps.legacy_math_rules)
ureg_property(c->ureg, TGSI_PROPERTY_LEGACY_MATH_RULES, 1);
+2 -3
View File
@@ -253,11 +253,10 @@ void nir_tgsi_scan_shader(const struct nir_shader *nir,
{
unsigned i;
info->processor = pipe_shader_type_from_mesa(nir->info.stage);
info->processor = nir->info.stage;
info->num_instructions = 1;
info->properties[TGSI_PROPERTY_NEXT_SHADER] =
pipe_shader_type_from_mesa(nir->info.next_stage);
info->properties[TGSI_PROPERTY_NEXT_SHADER] = nir->info.next_stage;
if (nir->info.stage == MESA_SHADER_VERTEX) {
info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION] =
@@ -58,18 +58,6 @@ tgsi_get_sysval_semantic(unsigned sysval);
enum tgsi_interpolate_mode
tgsi_get_interp_mode(enum glsl_interp_mode mode, bool color);
static inline mesa_shader_stage
pipe_shader_type_from_mesa(mesa_shader_stage stage)
{
STATIC_ASSERT((mesa_shader_stage) MESA_SHADER_VERTEX == MESA_SHADER_VERTEX);
STATIC_ASSERT((mesa_shader_stage) MESA_SHADER_FRAGMENT == MESA_SHADER_FRAGMENT);
STATIC_ASSERT((mesa_shader_stage) MESA_SHADER_TESS_CTRL == MESA_SHADER_TESS_CTRL);
STATIC_ASSERT((mesa_shader_stage) MESA_SHADER_TESS_EVAL == MESA_SHADER_TESS_EVAL);
STATIC_ASSERT((mesa_shader_stage) MESA_SHADER_GEOMETRY == MESA_SHADER_GEOMETRY);
STATIC_ASSERT((mesa_shader_stage) MESA_SHADER_COMPUTE == MESA_SHADER_COMPUTE);
return (mesa_shader_stage)stage;
}
static inline mesa_shader_stage
tgsi_processor_to_shader_stage(unsigned processor)
{
+2 -2
View File
@@ -2410,7 +2410,7 @@ ureg_setup_shader_info(struct ureg_program *ureg,
switch (info->stage) {
case MESA_SHADER_VERTEX:
ureg_setup_clipdist_info(ureg, info);
ureg_set_next_shader_processor(ureg, pipe_shader_type_from_mesa(info->next_stage));
ureg_set_next_shader_processor(ureg, info->next_stage);
break;
case MESA_SHADER_TESS_CTRL:
ureg_setup_tess_ctrl_shader(ureg, info);
@@ -2418,7 +2418,7 @@ ureg_setup_shader_info(struct ureg_program *ureg,
case MESA_SHADER_TESS_EVAL:
ureg_setup_tess_eval_shader(ureg, info);
ureg_setup_clipdist_info(ureg, info);
ureg_set_next_shader_processor(ureg, pipe_shader_type_from_mesa(info->next_stage));
ureg_set_next_shader_processor(ureg, info->next_stage);
break;
case MESA_SHADER_GEOMETRY:
ureg_setup_geometry_shader(ureg, info);
@@ -91,7 +91,7 @@ util_live_shader_cache_get(struct pipe_context *ctx,
nir_serialize(&blob, state->ir.nir, true);
ir_binary = blob.data;
ir_size = blob.size;
stage = pipe_shader_type_from_mesa(state->ir.nir->info.stage);
stage = state->ir.nir->info.stage;
} else {
assert(0);
return NULL;
+1 -1
View File
@@ -1860,7 +1860,7 @@ agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so,
NIR_PASS(_, nir, agx_nir_lower_sample_intrinsics, true);
}
so->type = pipe_shader_type_from_mesa(nir->info.stage);
so->type = nir->info.stage;
if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
nir->info.stage = MESA_SHADER_VERTEX;
@@ -1808,7 +1808,7 @@ ntr_should_vectorize_io(unsigned align, unsigned bit_size, unsigned num_componen
static nir_variable_mode
ntr_no_indirects_mask(nir_shader *s, struct pipe_screen *screen)
{
unsigned pipe_stage = pipe_shader_type_from_mesa(s->info.stage);
unsigned pipe_stage = s->info.stage;
unsigned indirect_mask = nir_var_shader_in | nir_var_shader_out;
if (!screen->shader_caps[pipe_stage].indirect_temp_addr) {
@@ -2116,7 +2116,7 @@ nir_to_rc(struct nir_shader *s, struct pipe_screen *screen,
}
c->s = s;
c->ureg = ureg_create(pipe_shader_type_from_mesa(s->info.stage));
c->ureg = ureg_create(s->info.stage);
ureg_setup_shader_info(c->ureg, &s->info);
if (s->info.use_legacy_math_rules && screen->caps.legacy_math_rules)
ureg_property(c->ureg, TGSI_PROPERTY_LEGACY_MATH_RULES, 1);
+1 -1
View File
@@ -147,7 +147,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
int processor = sel->ir_type == PIPE_SHADER_IR_TGSI ?
tgsi_get_processor_type(sel->tokens):
pipe_shader_type_from_mesa(sel->nir->info.stage);
sel->nir->info.stage;
bool dump = r600_can_dump_shader(&rctx->screen->b, processor);
+1 -3
View File
@@ -743,10 +743,8 @@ get_shader_program_completion_status(struct gl_context *ctx,
if (linked->Program->variants)
sh = linked->Program->variants->driver_shader;
unsigned type = pipe_shader_type_from_mesa(i);
if (sh &&
!screen->is_parallel_shader_compilation_finished(screen, sh, type))
!screen->is_parallel_shader_compilation_finished(screen, sh, i))
return false;
}
return true;
+2 -3
View File
@@ -69,7 +69,6 @@ st_bind_atomics(struct st_context *st, struct gl_program *prog,
mesa_shader_stage stage)
{
unsigned i;
mesa_shader_stage shader_type = pipe_shader_type_from_mesa(stage);
if (!prog || !st->pipe->set_shader_buffers || st->has_hw_atomics)
return;
@@ -87,11 +86,11 @@ st_bind_atomics(struct st_context *st, struct gl_program *prog,
st_binding_to_sb(&st->ctx->AtomicBufferBindings[atomic->Binding], &sb,
st->ctx->Const.ShaderStorageBufferOffsetAlignment);
st->pipe->set_shader_buffers(st->pipe, shader_type,
st->pipe->set_shader_buffers(st->pipe, stage,
buffer_base + atomic->Binding, 1, &sb, 0x1);
used_bindings = MAX2(atomic->Binding + 1, used_bindings);
}
st->last_used_atomic_bindings[shader_type] = used_bindings;
st->last_used_atomic_bindings[stage] = used_bindings;
}
void
+14 -15
View File
@@ -69,23 +69,22 @@ st_unbind_unused_cb0(struct st_context *st, mesa_shader_stage shader_type)
void
st_upload_constants(struct st_context *st, struct gl_program *prog, mesa_shader_stage stage)
{
mesa_shader_stage shader_type = pipe_shader_type_from_mesa(stage);
if (!prog) {
st_unbind_unused_cb0(st, shader_type);
st_unbind_unused_cb0(st, stage);
return;
}
struct gl_program_parameter_list *params = prog->Parameters;
assert(shader_type == MESA_SHADER_VERTEX ||
shader_type == MESA_SHADER_FRAGMENT ||
shader_type == MESA_SHADER_GEOMETRY ||
shader_type == MESA_SHADER_TESS_CTRL ||
shader_type == MESA_SHADER_TESS_EVAL ||
shader_type == MESA_SHADER_COMPUTE);
assert(stage == MESA_SHADER_VERTEX ||
stage == MESA_SHADER_FRAGMENT ||
stage == MESA_SHADER_GEOMETRY ||
stage == MESA_SHADER_TESS_CTRL ||
stage == MESA_SHADER_TESS_EVAL ||
stage == MESA_SHADER_COMPUTE);
/* update the ATI constants before rendering */
if (shader_type == MESA_SHADER_FRAGMENT && prog->ati_fs) {
if (stage == MESA_SHADER_FRAGMENT && prog->ati_fs) {
struct ati_fragment_shader *ati_fs = prog->ati_fs;
unsigned c;
@@ -144,7 +143,7 @@ st_upload_constants(struct st_context *st, struct gl_program *prog, mesa_shader_
_mesa_upload_state_parameters(st->ctx, params, ptr);
u_upload_unmap(pipe->const_uploader);
pipe->set_constant_buffer(pipe, shader_type, 0, true, &cb);
pipe->set_constant_buffer(pipe, stage, 0, true, &cb);
/* Set inlinable constants. This is more involved because state
* parameters are uploaded directly above instead of being loaded
@@ -168,7 +167,7 @@ st_upload_constants(struct st_context *st, struct gl_program *prog, mesa_shader_
values[i] = constbuf[prog->info.inlinable_uniform_dw_offsets[i]].u;
}
pipe->set_inlinable_constants(pipe, shader_type,
pipe->set_inlinable_constants(pipe, stage,
prog->info.num_inlinable_uniforms,
values);
}
@@ -183,7 +182,7 @@ st_upload_constants(struct st_context *st, struct gl_program *prog, mesa_shader_
if (params->StateFlags)
_mesa_load_state_parameters(st->ctx, params);
pipe->set_constant_buffer(pipe, shader_type, 0, false, &cb);
pipe->set_constant_buffer(pipe, stage, 0, false, &cb);
/* Set inlinable constants. */
unsigned num_inlinable_uniforms = prog->info.num_inlinable_uniforms;
@@ -194,15 +193,15 @@ st_upload_constants(struct st_context *st, struct gl_program *prog, mesa_shader_
for (unsigned i = 0; i < num_inlinable_uniforms; i++)
values[i] = constbuf[prog->info.inlinable_uniform_dw_offsets[i]].u;
pipe->set_inlinable_constants(pipe, shader_type,
pipe->set_inlinable_constants(pipe, stage,
prog->info.num_inlinable_uniforms,
values);
}
}
st->state.constbuf0_enabled_shader_mask |= 1 << shader_type;
st->state.constbuf0_enabled_shader_mask |= 1 << stage;
} else {
st_unbind_unused_cb0(st, shader_type);
st_unbind_unused_cb0(st, stage);
}
}
+1 -1
View File
@@ -599,7 +599,7 @@ st_link_glsl_to_nir(struct gl_context *ctx,
if (shader) {
struct gl_program *p = shader->Program;
if (p && p->variants) {
mesa_shader_stage type = pipe_shader_type_from_mesa(shader->Stage);
mesa_shader_stage type = shader->Stage;
driver_handles[type] = p->variants->driver_shader;
}
}
+2 -2
View File
@@ -581,7 +581,7 @@ void
st_make_bound_samplers_resident(struct st_context *st,
struct gl_program *prog)
{
mesa_shader_stage shader = pipe_shader_type_from_mesa(prog->info.stage);
mesa_shader_stage shader = prog->info.stage;
struct st_bound_handles *bound_handles = &st->bound_texture_handles[shader];
struct pipe_context *pipe = st->pipe;
GLuint64 handle;
@@ -628,7 +628,7 @@ void
st_make_bound_images_resident(struct st_context *st,
struct gl_program *prog)
{
mesa_shader_stage shader = pipe_shader_type_from_mesa(prog->info.stage);
mesa_shader_stage shader = prog->info.stage;
struct st_bound_handles *bound_handles = &st->bound_image_handles[shader];
struct pipe_context *pipe = st->pipe;
GLuint64 handle;