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freedreno/a6xx: Drop orval/shift

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These where always zero for a6xx, and not really supported by the reg
packers.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
This commit is contained in:
Rob Clark
2025-07-17 14:22:16 -07:00
committed by Marge Bot
parent 2a7f70f697
commit 5dce5891d2
5 changed files with 52 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/freedreno/drm/freedreno_ringbuffer.h
+41 -33
View File
@@ -301,39 +301,6 @@ __reloc_iova(struct fd_bo *bo, uint32_t offset, uint64_t orval, int32_t shift)
return iova;
}
/*
* NOTE: OUT_RELOC() is 2 dwords (64b) on a5xx+
*/
static inline void
OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo, uint32_t offset,
uint64_t orval, int32_t shift)
{
if (LOG_DWORDS) {
fprintf(stderr, "ring[%p]: OUT_RELOC %04x: %p+%u << %d", ring,
(uint32_t)(ring->cur - ring->start), bo, offset, shift);
}
assert(offset < fd_bo_size(bo));
uint64_t iova = __reloc_iova(bo, offset, orval, shift);
#if FD_BO_NO_HARDPIN
uint64_t *cur = (uint64_t *)ring->cur;
*cur = iova;
ring->cur += 2;
fd_ringbuffer_assert_attached(ring, bo);
#else
struct fd_reloc reloc = {
.bo = bo,
.iova = iova,
.orval = orval,
.offset = offset,
.shift = shift,
};
fd_ringbuffer_reloc(ring, &reloc);
#endif
}
static inline void
OUT_RB(struct fd_ringbuffer *ring, struct fd_ringbuffer *target)
{
@@ -403,4 +370,45 @@ OUT_WFI5(struct fd_ringbuffer *ring)
} /* end of extern "C" */
#endif
/*
* NOTE: OUT_RELOC() is 2 dwords (64b) on a5xx+
*/
static inline void
OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo, uint32_t offset,
uint64_t orval, int32_t shift)
{
if (LOG_DWORDS) {
fprintf(stderr, "ring[%p]: OUT_RELOC %04x: %p+%u << %d", ring,
(uint32_t)(ring->cur - ring->start), bo, offset, shift);
}
assert(offset < fd_bo_size(bo));
uint64_t iova = __reloc_iova(bo, offset, orval, shift);
#if FD_BO_NO_HARDPIN
uint64_t *cur = (uint64_t *)ring->cur;
*cur = iova;
ring->cur += 2;
fd_ringbuffer_assert_attached(ring, bo);
#else
struct fd_reloc reloc = {
.bo = bo,
.iova = iova,
.orval = orval,
.offset = offset,
.shift = shift,
};
fd_ringbuffer_reloc(ring, &reloc);
#endif
}
#ifdef __cplusplus
static inline void
OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo, uint32_t offset)
{
OUT_RELOC(ring, bo, offset, 0, 0);
}
#endif
#endif /* FREEDRENO_RINGBUFFER_H_ */
src/gallium/drivers/freedreno/a6xx/fd6_context.h
+1 -1
View File
@@ -162,7 +162,7 @@ struct fd6_control {
};
#define control_ptr(fd6_ctx, member) \
(fd6_ctx)->control_mem, offsetof(struct fd6_control, member), 0, 0
(fd6_ctx)->control_mem, offsetof(struct fd6_control, member)
static inline void
emit_marker6(struct fd_ringbuffer *ring, int scratch_idx)
src/gallium/drivers/freedreno/a6xx/fd6_emit.h
+7 -11
View File
@@ -202,8 +202,8 @@ fd6_emit_get_prog(struct fd6_emit *emit)
template <chip CHIP>
static inline void
__event_write(struct fd_ringbuffer *ring, enum fd_gpu_event event,
enum event_write_src esrc, enum event_write_dst edst, uint32_t val,
struct fd_bo *bo, uint32_t offset, uint64_t orval, int32_t shift)
enum event_write_src esrc, enum event_write_dst edst,
uint32_t val, struct fd_bo *bo, uint32_t offset)
{
struct fd_gpu_event_info info = fd_gpu_events<CHIP>[event];
unsigned len = info.needs_seqno ? 4 : 1;
@@ -223,7 +223,7 @@ __event_write(struct fd_ringbuffer *ring, enum fd_gpu_event event,
}
if (info.needs_seqno) {
OUT_RELOC(ring, bo, offset, orval, shift); /* ADDR_LO/HI */
OUT_RELOC(ring, bo, offset); /* ADDR_LO/HI */
if (len == 4)
OUT_RING(ring, val);
}
@@ -231,20 +231,16 @@ __event_write(struct fd_ringbuffer *ring, enum fd_gpu_event event,
template <chip CHIP>
static inline void
fd6_record_ts(struct fd_ringbuffer *ring, struct fd_bo *bo, uint32_t offset,
uint64_t orval, int32_t shift)
fd6_record_ts(struct fd_ringbuffer *ring, struct fd_bo *bo, uint32_t offset)
{
__event_write<CHIP>(ring, FD_RB_DONE, EV_WRITE_ALWAYSON, EV_DST_RAM, 0,
bo, offset, orval, shift);
__event_write<CHIP>(ring, FD_RB_DONE, EV_WRITE_ALWAYSON, EV_DST_RAM, 0, bo, offset);
}
template <chip CHIP>
static inline void
fd6_fence_write(struct fd_ringbuffer *ring, uint32_t val, struct fd_bo *bo,
uint32_t offset, uint64_t orval, int32_t shift)
fd6_fence_write(struct fd_ringbuffer *ring, uint32_t val, struct fd_bo *bo, uint32_t offset)
{
__event_write<CHIP>(ring, FD_CACHE_CLEAN, EV_WRITE_USER_32B, EV_DST_RAM, val,
bo, offset, orval, shift);
__event_write<CHIP>(ring, FD_CACHE_CLEAN, EV_WRITE_USER_32B, EV_DST_RAM, val, bo, offset);
}
template <chip CHIP>
src/gallium/drivers/freedreno/a6xx/fd6_query.cc
+2 -3
View File
@@ -42,8 +42,7 @@ FD_DEFINE_CAST(fd_acc_query_sample, fd6_query_sample);
#define query_sample_idx(aq, idx, field) \
fd_resource((aq)->prsc)->bo, \
(idx * sizeof(struct fd6_query_sample)) + \
offsetof(struct fd6_query_sample, field), \
0, 0
offsetof(struct fd6_query_sample, field)
/* offset of a single field of fd6_query_sample: */
#define query_sample(aq, field) query_sample_idx(aq, 0, field)
@@ -314,7 +313,7 @@ static void
record_timestamp(struct fd_ringbuffer *ring, struct fd_bo *bo, unsigned offset)
{
fd_ringbuffer_attach_bo(ring, bo);
fd6_record_ts<CHIP>(ring, bo, offset, 0, 0);
fd6_record_ts<CHIP>(ring, bo, offset);
}
static void
src/gallium/drivers/freedreno/freedreno_autotune.h
+1 -1
View File
@@ -116,7 +116,7 @@ struct fd_autotune_results {
#define __offset(base, ptr) ((uint8_t *)(ptr) - (uint8_t *)(base))
#define results_ptr(at, member) \
(at)->results_mem, __offset((at)->results, &(at)->results->member), 0, 0
(at)->results_mem, __offset((at)->results, &(at)->results->member)
struct fd_batch_history;