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Nanley Chery c488fb6dfe iris: Fix fast-clears of swizzled alpha formats 
Resources with alpha formats that are mapped to R are fast-cleared with
the wrong clear color.

When such resources with are cleared via iris_clear_texture,
isl_color_value_unpack places channel data in the R channel.
convert_fast_clear_color then overwrites the channel with 0.

To avoid zeroing the clear color, move convert_fast_clear_color to the
other callers of clear_color: iris_clear and iris_clear_render_target.

Enables iris to pass the "A" case of the fcc-clear-tex piglit test.

v2. Rename convert_fast_clear_color to convert_clear_color. (Ken)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3670
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7345>
 2020-11-04 19:06:48 +00:00
Nanley Chery 60336cac60 iris: Fix SINT assert in convert_fast_clear_color 
Don't assert that the size of every channel is greater than zero. This
assert doesn't work for integer formats with less than 4 channels.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7345>
 2020-11-04 19:06:48 +00:00
Nanley Chery 4cb9b5db2c iris: Fix fast-clears of swizzled LA formats 
Resources with luminance alpha formats that are mapped to RG are
fast-cleared with the wrong clear color.

When such resources with are cleared via iris_clear_texture,
isl_color_value_unpack places channel data in the R and G channels.
convert_fast_clear_color then overwrites the G channel with R.

Delete the clear color override that's specific to luminance alpha
formats.

Enables iris to pass the "LA" case of the fcc-clear-tex piglit test.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7345>
 2020-11-04 19:06:48 +00:00
Kenneth Graunke 382451ff9d iris: fix source/destination layers for 3D blits 
See commit ea32691257 for the
corresponding fix in anv.

Fixes Piglit's fbo-generatemipmap-3d.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7321>
 2020-11-04 10:41:43 -08:00
Eric Anholt 61ce544d07 st/nir: Drop setting interp mode on system values in builtins. 
It's initialized to INTERP_MODE_NONE on creation, which makes more sense
for sysvals than FLAT, and is also the interp mode that GLSL IR sets up
for sysvals.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7320>
 2020-11-04 09:33:05 -08:00
Eric Anholt 9143c08125 st/nir: Fix the st->pbo.use_gs case. 
This case hadn't been ported to NIR before, and I missed that when
removing the TGSI path and replacing it with NIR -> NTT for TGSI drivers.
This caused breakage in nv50 on piglit's pbo-teximage.

In the process, the !use_gs gets its layer output fixed to be an int
instead of a vec4, which I suspect would fix validation in that path.

Fixes: 57effa342b ("st/mesa: Drop the TGSI paths for PBOs and use nir-to-tgsi if needed.")
Closes: #3680
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7320>
 2020-11-04 09:33:05 -08:00
Alyssa Rosenzweig f8c1d79f69 pan/bi: Correctly calculate render target index 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:29 -05:00
Alyssa Rosenzweig 9a6dad18d8 pan/bi: Lower depth/stencil stores 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:29 -05:00
Alyssa Rosenzweig 6433fedcf1 pan/bi: Emit +ZS_EMIT as needed 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig 0c889e7611 pan/bi: Stub handling for nir_intrinsic_store_combined_output_pan 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig f67b49d512 pan/bi: Factor out bi_emit_blend 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig 928f2bc0d5 pan/bi: Factor out bi_emit_atest 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig f14beeb4ce pan/bi: Infer z/stencil flags from sources passed 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig 2b1db3662f pan/bi: Add +ZS_EMIT instruction to IR 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig cd66aa712d panfrost: Deduplicate shader properties 
Between Midgard and Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig 4a2ecc72d3 panfrost: Pass through src_type 
Needed since Bifrost blends are typed well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig 42319c5626 pan/mdg: Move writeout lowering to common panfrost 
These will be used in the Bifrost compiler, albeit for a slightly
different purpose.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig dfaa4c51fb pan/mdg: Deduplicate nir_find_variable_with_driver_location 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig a05921b9f2 nir: Add SRC_TYPE to store_combined_output_pan 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:08 -05:00
Iago Toral Quiroga fa869fb9b4 v3dv: add a v3dv_bo_init helper 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7440>
 2020-11-04 13:56:51 +01:00
Tony Wasserka 456beb40b8 aco/ra: Fix counting of subdword variables in get_reg_create_vector 
The loop variable "k" shadowed another variable in the outer scope, so
this loop had no actual effect.

Fixes: 52cc1f8237 ("aco: improve p_create_vector RA for sub-dword operands")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7427>
 2020-11-04 12:08:49 +00:00
Rhys Perry 786828131a aco: implement 8/16-bit instructions which can be trivially widened 
When nir_lower_bit_size becomes more capable, we might want to revert some
of this.

fossil-db (parallel-rdp, Navi):
Totals from 217 (31.77% of 683) affected shaders:
SGPRs: 11320 -> 10200 (-9.89%)
VGPRs: 7156 -> 7364 (+2.91%)
CodeSize: 1453948 -> 1430136 (-1.64%); split: -1.66%, +0.02%
Instrs: 258530 -> 254840 (-1.43%); split: -1.44%, +0.01%
Cycles: 37334360 -> 37247936 (-0.23%); split: -0.26%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry ef95ba8cdd aco: implement some 16-bit arithmetic instead of lowering 
fossil-db (parallel-rdp, Navi):
Totals from 210 (30.75% of 683) affected shaders:
SGPRs: 9704 -> 10248 (+5.61%)
VGPRs: 5884 -> 5368 (-8.77%)
CodeSize: 1155564 -> 1098752 (-4.92%)
Instrs: 199927 -> 189940 (-5.00%)
Cycles: 20438392 -> 19860124 (-2.83%)

v2: use divergence analysis to determine which instructions to lower.

Co-Authored-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry 8ed7cad75f radv: rework nir_lower_bit_size callback and run DA on GFX8+ 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry b2ce7da149 radv: do nir_lower_bit_size after algebraic optimizations 
There are too many algebraic optimizations to be certain that one of them
couldn't create instructions which need lowering. It also creates better
code for some reason.

fossil-db (parallel-rdp, Navi):
Totals from 217 (31.77% of 683) affected shaders:
VGPRs: 7716 -> 7672 (-0.57%)
CodeSize: 1516152 -> 1510688 (-0.36%); split: -0.38%, +0.02%
MaxWaves: 3964 -> 3982 (+0.45%)
Instrs: 269445 -> 268508 (-0.35%); split: -0.36%, +0.02%
Cycles: 37963416 -> 37912592 (-0.13%); split: -0.15%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry c77114967f radv: move a few passes to after load/store vectorization 
load/store vectorization can create 8/16-bit alu to do packing/unpacking,
which would make shader_info::bit_sizes_used out of date.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry 475077c790 nir/lower_bit_size: optimize upcast of b2i8/b2i16 
This also seems to be done by nir_opt_algebraic, but RADV will be moving
nir_lower_bit_size() to after that (so it doesn't create unsupported
8/16-bit instructions) and it doesn't seem worth creating a new pass just
for this simple optimization.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry 4e5c85526b nir: add shader_info::bit_sizes_used 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Pierre-Eric Pelloux-Prayer 7d3df69914 va: support VA_RT_FORMAT_PROTECTED 
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:23 +01:00
Pierre-Eric Pelloux-Prayer 81be8b3c2f va/picture: make sure destination buffer is protected if needed 
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:22 +01:00
Veerabadhran Gopalakrishnan 70191f38e3 frontends/va: Added protected playback support for VP9 
Add VP9 header handling in slice data buffer.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:20 +01:00
Boyuan Zhang f20a20b1e3 radeon/vcn: program drm message buffer 
Add a function to handle drm message buffer using input decryption parameters.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:19 +01:00
Pierre-Eric Pelloux-Prayer ebbf40fa26 radeon/vcn: delay dec->ctx and dec->dpb allocation 
This will allow to allocate them as encrypted if needed.

Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:18 +01:00
Pierre-Eric Pelloux-Prayer cf324df6ea radeon: add si_vid_create_tmz_buffer helper 
Same code as si_vid_create_buffer except that the buffer is using TMZ.

Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:06 +01:00
Boyuan Zhang 024be710a7 radeon/vcn: add defines for drm message buffer 
Add defines and structure for drm message buffer.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:21:40 +01:00
Boyuan Zhang b9753fdc58 radeon: add decryption params definition header 
Add a header file for decryption parameters.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:21:39 +01:00
Boyuan Zhang deb7dc82f6 frontends/va: handle protected slice data buffer 
Add a function to handle VaProtectedSliceDataBuffer, which is used for
sending decryption parameters. Also, for protected playback, there is
no need to check start code since data is encrypted.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:21:36 +01:00
Boyuan Zhang 5f0816eac0 vl: add flag and definition for protected playback 
Add a flag to indicate if playback is protected/encrypted.
Add a pointer to decryption key for later decryption use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:21:13 +01:00
Jason Ekstrand 58e7088628 nir/find_array_copies: Don't assume all children exist 
Fixes: 9f3c595dfc "nir/find_array_copies: Handle cast derefs"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7437>
 2020-11-04 05:57:07 +00:00
Vinson Lee e1736c7fdb radesonsi: Remove unnecessary shader->selector NULL check. 
shader->selector->info.stage == MESA_SHADER_COMPUTE at this case statement.

Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking shader->selector suggests that it may
be null, but it has already been dereferenced on all paths leading to
the check.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7266>
 2020-11-03 20:58:46 -08:00
Dave Airlie 5fb77a582a lavapipe: request correct sample mask behaviour 
Fixes:
dEQP-VK.rasterization.frag_side_effect*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7435>
 2020-11-04 01:53:29 +00:00
Dave Airlie 47701d47e7 llvmpipe: respect the sample mask in non-multisample flag 
This partly revert
50987644 llvmpipe: don't use sample mask with 0 samples

since Vulkan wants this behaviour.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7435>
 2020-11-04 01:53:29 +00:00
Dave Airlie 3dc6da1ac1 gallium: add a non-multisample sample mask out behaviour flag. 
Vulkan/DX want to use output sample mask even when not multisampling
GL wants it ignored.

Add a rasterizer flag to lavapipe can get correct behaviour.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7435>
 2020-11-04 01:53:29 +00:00
Jason Ekstrand 4ff4d4e569 nir/opt_intrinsic: Optimize bcsel(b, shuffle(x, i), shuffle(x, j)) 
The shuffles provided by the SPV_INTEL_subgroups extension generate

    bcsel(b, shuffle(x, i), shuffle(y, j))

In the case where x and y are the same, we can turn this into a shuffle
with the bcsel on the index which lets us drop a whole shuffle.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 2f5b56ae23 nir/opt_intrinsics: Refactor a bit 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 3b281861c1 nir/constant_folding: Fold subgroup shuffle intrinsics 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand e59d6350d1 nir: Move constant folding of vote to opt_constant_folding 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 9492ab2864 nir/constant_folding: Use the standard variable naming convention 
Typically, if we have one alu instruction, we call it "alu" and if we
have one intrinsic we call it "intrin".

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 9d2ccbfc15 nir/constant_folding: Use a switch in try_fold_intrinsic 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand d9c0f3627d nir/opt_intrinsics: Report progress for the gl_SampleMask optimization 
Fixes: d3ce8a7f6b "nir: optimize gl_SampleMaskIn to gl_HelperInvocation..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00