pan/bi: Add +ZS_EMIT instruction to IR

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>

src/panfrost/bifrost/bi_pack.c

@@ -912,6 +912,8 @@ bi_pack_add(bi_clause *clause, bi_bundle bundle, bi_registers *regs, gl_shader_s
                         return pan_pack_add_texs_2d_f32(clause, bundle.add, regs);
 case BI_ROUND:
                 unreachable("Packing todo");
+        case BI_ZS_EMIT:
+                return pan_pack_add_zs_emit(clause, bundle.add, regs);
         default:
                 unreachable("Cannot encode class as ADD");
         }

src/panfrost/bifrost/bi_print.c

@@ -76,6 +76,7 @@ bi_class_name(enum bi_class cl)
         case BI_TEXC_DUAL: return "texc_dual";
         case BI_ROUND: return "round";
         case BI_IMUL: return "imul";
+        case BI_ZS_EMIT: return "zs_emit";
         default: return "unknown_class";
         }
 }

src/panfrost/bifrost/bi_schedule.c

@@ -83,6 +83,9 @@ bi_message_type_for_ins(bi_instruction *ins)
         case BI_ATEST:
                 return BIFROST_MESSAGE_ATEST;
 
+        case BI_ZS_EMIT:
+                return BIFROST_MESSAGE_Z_STENCIL;
+
         default:
                 unreachable("Invalid high-latency class");
         }

src/panfrost/bifrost/bi_tables.c

@@ -61,4 +61,5 @@ unsigned bi_class_props[BI_NUM_CLASSES] = {
         [BI_TEXC_DUAL] 		= BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST,
         [BI_ROUND] 		= BI_ROUNDMODE | BI_SCHED_ALL,
         [BI_IMUL]       = BI_SCHED_FMA,
+        [BI_ZS_EMIT]            = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_DATA_REG_DEST,
 };

src/panfrost/bifrost/compiler.h

@@ -81,6 +81,7 @@ enum bi_class {
         BI_TEXC_DUAL,
         BI_ROUND,
         BI_IMUL,
+        BI_ZS_EMIT,
         BI_NUM_CLASSES
 };