c3c80c5c22
llvmpipe: Skip blending when mask is zero.
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This increases quake3 timedemo fps another 10%.
2009-09-10 12:01:42 +01:00
8e6b925d2a
llvmpipe: Proper control flow builders.
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New control flow helper functions which keep track of all variables
and generate the correct Phi functions.
This re-enables skipping the fs execution of quads masked out by
the rasterizer, early z testing, and kill opcode.
This yields a performance improvement of around 20%.
2009-09-10 11:44:03 +01:00
bd3b59da63
llvmpipe: Copy the texture target into the sampler static state.
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Hunk forgotten in previous commit.
2009-09-10 09:19:51 +01:00
4139bc8f43
llvmpipe: Quick hack for 1D textures.
2009-09-09 21:48:50 +01:00
b0b131b023
scons: Pass -mstackrealign option to gcc.
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It is impossible to have gcc generate SSE code without it, as thirdparty
applications often call us with an unaligned stack pointer.
2009-09-09 21:48:50 +01:00
abc160b664
llvmpipe: Fix depth mask computation.
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Fixes depth test for 24bit depth formats.
2009-09-09 21:48:50 +01:00
cdbbcdf3bd
llvmpipe: Include zsbuf's format in the fragment shader key.
2009-09-09 21:48:50 +01:00
da912a7a16
util: Fix depth/stencil format description.
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Inverse channel order.
2009-09-09 21:48:49 +01:00
01c831576e
llvmpipe: Debug function to check stack alignment.
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Doing alignment check in locus is redundant, as gcc alignment assumptions
will optimize away the check.
2009-09-09 21:48:49 +01:00
5604b27b93
i965: Fix relocation delta for WM surfaces.
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This was a regression in 0f328c90db#23688
Bug #23254
2009-09-09 12:52:52 -07:00
4d85a6b393
i965: fix an overlooked merge conflict
2009-09-09 09:24:38 -06:00
49c230709c
r600: check if textures are actually enabled before submission
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noticed by taiu on IRC.
2009-09-09 11:17:24 -04:00
7bf6347362
Merge branch 'mesa_7_6_branch'
2009-09-09 09:00:58 -06:00
94a8157ef6
mesa: regenerate get.c form get_gen.py
2009-09-09 08:55:32 -06:00
3fed69eb16
mesa: move call to init_c_cliptest() from enable.c to tnl module.
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Fixed gallium build breakage.
2009-09-09 08:54:38 -06:00
0c309bb494
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
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Conflicts:
Makefile
configs/default
progs/glsl/Makefile
src/gallium/auxiliary/util/u_simple_shaders.c
src/gallium/state_trackers/glx/xlib/xm_api.c
src/mesa/drivers/dri/i965/brw_draw_upload.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/intel/intel_context.h
src/mesa/drivers/dri/intel/intel_pixel.c
src/mesa/drivers/dri/intel/intel_pixel_read.c
src/mesa/main/texenvprogram.c
src/mesa/main/version.h
2009-09-09 08:33:39 -06:00
c6c44bf481
gallium: Added HaikuOS platform
2009-09-09 08:24:18 -06:00
89a765e92b
mesa: disable GL_LUMINANCE case in _mesa_meta_draw_pixels()
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Works around a bug found on i965. See bug 23670.
2009-09-09 08:23:14 -06:00
d27d659043
scons: Set default_dri to no for Mac OS.
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Mac OS does not have libdrm.
2009-09-09 08:21:07 -06:00
da9ed257a3
r600: fix ftp for dri1
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We use t->bo for dri1 since r600 uses CS for dri1.
2009-09-09 01:43:17 -04:00
ca246dd186
intel: add B43 chipset support
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Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com >
2009-09-09 13:28:59 +08:00
5aaa45de4c
r600: don't setup hardware state if TFP
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if we have a BO here it means TFP and we should have set it
up already.
tested by b0le on #radeon
2009-09-09 15:02:16 +10:00
8947cf6728
progs/tests: added Z invert option
2009-09-08 16:47:30 -06:00
f78eafcacb
mesa: bump version to 7.7
2009-09-08 16:46:06 -06:00
97cbaab541
gallium: added r8g8b8_get/put_tile_rgba()
2009-09-08 16:45:34 -06:00
079ae4c38c
progs/demos: added RGB invert option
2009-09-08 16:45:07 -06:00
126696caf7
mesa: fix viewport_z_clip breakage
2009-09-08 16:44:49 -06:00
e589a37f7b
i915g: Add buffer write callback
2009-09-09 00:43:36 +01:00
d112132840
i915g: Reorg vbuf code a bit
2009-09-09 00:43:36 +01:00
547b726484
i915g: pwrite batchbuffer instead of map
2009-09-09 00:43:36 +01:00
d585616f5b
i915g: Keep vertex buffers in a fifo
2009-09-09 00:43:35 +01:00
6e61d06209
util: Add super simple fifo
2009-09-09 00:43:35 +01:00
3833587818
i915g: Map vertex buffers via gtt
2009-09-09 00:43:35 +01:00
530fbd314e
i915g: Remove lib prefix from driver
2009-09-09 00:43:35 +01:00
9fff4b46d3
docs: Add basic 7.7 relnotes.
2009-09-08 15:12:22 -07:00
f959ccdfa6
intel: Add support for ARB_draw_elements_base_vertex.
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On the 965, we just drop the value into the primitive packet. On non-945,
we rely on the sw tnl code handling it.
2009-09-08 15:12:22 -07:00
92d7ed8a20
mesa: Add support for ARB_draw_elements_base_vertex.
2009-09-08 15:12:20 -07:00
ec9e729580
glapi: Add ARB_draw_elements_base_vertex
2009-09-08 14:48:47 -07:00
b11a8ea863
mesa: Expose NV_depth_clamp if ARB_depth_clamp is supported.
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The wording of these two is exactly the same, except for the issue
"Can fragments with wc<=0 be generated when this extension is supported?",
which idr thinks is a non-issue for us.
2009-09-08 14:30:18 -07:00
0310aafd9e
i965: Add support for ARB_depth_clamp.
2009-09-08 14:30:18 -07:00
0e5c2598ec
Regenerate files for GL_ARB_depth_clamp.
2009-09-08 14:30:18 -07:00
b4922b5331
mesa: Add support for ARB_depth_clamp.
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This currently doesn't include fixing up the cliptests in the assembly
paths to support ARB_depth_clamp, so enabling depth_clamp forces the C path.
2009-09-08 14:30:15 -07:00
3e4539a471
i965: Respect spec requirement for pixel shader computed depth with no zbuffer.
2009-09-08 14:28:23 -07:00
15c0cc5cf4
i965: Set NULL WM surfaces as tiled according to requirement by specs.
2009-09-08 14:28:23 -07:00
ea6dab2537
i965: Use the renderbuffer surface size instead of region size for WM surfaces.
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For drawing to lower mipmap levels, the region size makes the renderbuffer
be the size of the lowest level, instead of the current level. On DRI1,
Brian previously found that the RB size was incorrect, so leave this broken
there.
2009-09-08 14:28:23 -07:00
58a57e3fc4
Revert "intel: helper to debug bufmgr (disabled)"
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This reverts commit e0ec405a9f
2009-09-08 14:28:23 -07:00
42943a4cf9
mesa: bump version to 7.5.2
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I'm not 100% sure there'll be a 7.5.2 release, but just in case.
2009-09-08 14:45:27 -06:00
b2de028523
i965: #include clean-ups
2009-09-08 14:33:47 -06:00
e61215242b
intel: #include clean-ups
2009-09-08 14:33:47 -06:00
8e8d3470be
i965: use _mesa_is_bufferobj()
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Also, remove unneeded call to _mesa_validate_pbo_access(). It's done by
core Mesa as the comment suggested.
2009-09-08 14:33:47 -06:00
José Fonseca