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111409 Commits

Author SHA1 Message Date
Ilia Mirkin bdf20d324b nvc0: enable EXT_texture_shadow_lod 
This passes all the CTS tests for this extension.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
 2020-03-02 20:01:13 -05:00
Ilia Mirkin 11a06dfd4b st/mesa: allow TXB2/TXL2 to work with cube array shadow textures 
It's a bit asymmetric, but it's such a contrived use-case, and not a lot
of drivers will support it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
 2020-03-02 20:00:52 -05:00
Ilia Mirkin 1d3b0b9088 nv50,nvc0: add newly added PIPE_CAP's to list 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
 2020-03-02 19:55:06 -05:00
Paulo Zanoni 62f7197fb5 anv: multiply the scratch space by 4 on gen9-10 like iris and i965 
My understanding is that there's no reason for the scratch space
allocation to be different between iris, i965 and anv. Let's make all
the functions behave the same.

I don't know if this fixes any specific gen9 bugs, it it might since
it increases the scratch space.

v2: Rebase.
v3: Rebase.
v4: Remove redundant gen 11 check (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
 2020-03-03 00:36:10 +00:00
Paulo Zanoni aa78801f0a intel/device: bdw_gt1 actually has 6 eus per subslice 
Found by inspection, I'm not aware of any bugs caused by this typo.

According to Lionel, it seems we only use this to generate masks
of available EUs for perfromance queries, and it's only used when we
can't query the fused parts of the GPU through DRM_IOCTL_I915_QUERY.
So this patch should help for the corner case where the Kernel is too
old to support the query ioctl.

v2: improve commit message, cc stable (Lionel).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
 2020-03-03 00:36:10 +00:00
Paulo Zanoni 9e5ce30da7 intel: fix the gen 12 compute shader scratch IDs 
This is the same idea as "intel: fix the gen 11 compute shader scratch
IDs".

The number of EUs on TGL is not the same as ICL, but the
MEDIA_VFE_STATE restrictions stay the same, so adapt the code to it.
Also, consider the base configuration instead of what we read from the
Kernel.

According to Mark, this fixes the following piglit tests on TGL:

    piglit.spec.arb_compute_shader.execution.shared-atomicmax-uint.tglm64
    piglit.spec.arb_compute_shader.execution.shared-atomicmax-int.tglm64
    piglit.spec.intel_shader_atomic_float_minmax.execution.shared-atomicmax-float.tglm64

v2: s/ICL+/Gen11+/ (Jason).

Cc: mesa-stable@lists.freedesktop.org
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
 2020-03-03 00:36:10 +00:00
Paulo Zanoni 1efe139cad intel: fix the gen 11 compute shader scratch IDs 
Scratch space allocation is based on the number of threads in the base
configuration, and we only have one base configuration for ICL, with 8
subslices.

This fixes an issue with Aztec on Vulkan in a machine with a
configuration that's not the base. The issue looks like a regression
from b9e93db208, but it seems things are broken since forever, just
not easily reproducible.

v2: Reimplement it using the subslices variable. Don't touch TGL.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
 2020-03-03 00:36:10 +00:00
Alyssa Rosenzweig d0c66869c1 pan/bi: Move some definitions from disasm to bifrost.h 
These are generally useful outside the disassmbler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 346262ceb6 pan/bi: Structify FMA_FADD 
Just to make it easier to work with.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 4fe5b59a96 pan/bi: Squash LD_ATTR ops together 
*whistles*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig ee957bc0f3 pan/bi: Combine LOAD_VARYING_ADDRESS instructions by type 
It's all a single opcode in fact.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 36fe378f1c pan/bi: Decode ADD_SHIFT properly 
Just like FMA_SHIFT, but with some bits shuffled around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 8c79c710d4 pan/bi: Identify extended FMA opcodes 
When the top 3 bits of the opcode are 111, it leads to a special
extended opcode mode instead.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig b51468ed9c pan/bi: Add v4i8 mode to FMA_SHIFT 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 2db454bbab pan/bi: Decode FMA_SHIFT properly 
The shift-bitwise ops are fairly configurable, let's decode this the
right way. Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 67bbaddf7d pan/bi: Move notes on ADD ops to notes file 
Again, we'd like to see just the opcode table more clearly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 7c96bd2dc5 pan/bi: Introduce CSEL4 class 
All of these "ops" are just variants on the same.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 19a449e425 pan/bi: Move notes on FMA opcodes from disassembler 
We're going to be shuffling around the opcode table, so let's get this
moved out first.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig dff83476c4 pan/bi: Add ICMP.GL.NEQ op 
A fused not useful to feed into `discard`.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 178d9d4269 pan/bi: Add discard ops 
These run on the ADD unit and evidently need to be their own clause
(probably treated as a high-latency instruction). Like csel, they can
either do a float comparison directly or ingest a 0/1 value.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 3044a37a84 pan/decode: Skip analysis for Bifrost tiler structures 
We don't understand the Bifrost at all yet, so let's just print and move
on.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig acd140c2e2 pan/decode: Fix tiler weights printing 
Theoretical - still always zero.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 3f5cd446b2 pan/decode: Restore bifrost sample_locations 
Code by Connor Abbott, reverting a part of
254f40fd53 where it was removed during a
Midgard refactor.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig 5815f33c6b pan/decode: Calm an assert to a pandecode error 
We'd like to see what the problem actually was...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
 2020-03-03 00:03:50 +00:00
Rafael Antognolli b4ddc6139b iris: Wait for the GPU to be idle before invalidating the aux table. 
An end of pipe sync seems to satisfy this restriction. It takes care of
GPU hangs seen in dEQP-GLES31.functional.copy_image.* tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
 2020-03-02 22:28:11 +00:00
Rafael Antognolli a7de6f1321 iris: Split aux map initialization from invalidation. 
We can write the aux map address only once during the batch
initialization, and then only invalidate it once we modify it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
 2020-03-02 22:28:11 +00:00
Rafael Antognolli 43dc842cb9 anv: Wait for the GPU to be idle before invalidating the aux table. 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
 2020-03-02 22:28:11 +00:00
Jason Ekstrand 3ca3050de5 anv: Do end-of-pipe sync around MCS/CCS ops instead of CS stall 
v2: Do end-of-pipe sync after clear depth stencil too (Jason).
v3: Also do end-of-pipe sync before clear depth stencil too (Jason).

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
 2020-03-02 22:28:11 +00:00
Jason Ekstrand 2db471953a anv: Use a proper end-of-pipe sync instead of just CS stall 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
 2020-03-02 22:28:11 +00:00
Jason Ekstrand ac8d412ba3 anv: Use the PIPE_CONTROL instead of bits for the CS stall W/A 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
 2020-03-02 22:28:11 +00:00
Dave Airlie bb2287ccdf gallivm/tessellator: use private functions for min/max to avoid namespace issues 
Different builds are failing because of namespace collisions here.

Just fix the MS code to avoid it.

Fixes: bd0188f9ea ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.")

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2586
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>
 2020-03-03 07:30:07 +10:00
Ivan Molodetskikh c376865f5e egl: allow INVALID format for linux_dmabuf 
As per
https://gitlab.freedesktop.org/wayland/wayland-protocols/commit/fb9b2a87317c77e26283da5f6c9559d709f6fdcd,
the compositor may advertise DRM_FORMAT_MOD_INVALID as a supported
modifier. This patch makes mesa recognize this fact and allow
linux_dmabuf usage with the INVALID modifier in this case.

In case the driver doesn't support modifiers, we can still use
linux-dmabuf protocol instead of the legacy wl_drm interface to create
wl_buffers. This will help compositors to handle these buffers better.

In this commit, the INVALID modifier is allowed to be added to the list
of supported modifiers, and create_wl_buffer will be able to use
linux_dmabuf with an INVALID modifier if the compositor advertised it as
supported.

Signed-off-by: Ivan Molodetskikh <yalterz@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2147>
 2020-03-02 21:09:26 +00:00
Vasily Khoruzhick 646fbb1c4f lima: add RGBA5551 and RGBA4444 formats 
We also need to set channel_layout in pp_frame reg (previously known as
foureight) depending on cbuf format.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>
 2020-03-02 12:48:44 -08:00
Gert Wollny adcb365c1d r600/sfn: Don't try to catch exceptions, the driver doesn't throw any 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
 2020-03-02 20:00:26 +01:00
Gert Wollny b66170b537 r600/sfn: Use static_cast when type is already known 
In all these cases the type was tested before based, so don't use
dynamic_casts.

Closes #2566

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
 2020-03-02 20:00:23 +01:00
Gert Wollny 7780b50b7e r600/sfn: Avoid using dynamic_cast to identify type 
v2: Fix typo (maurossi)

Related: #2566

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
 2020-03-02 20:00:14 +01:00
Albert Astals Cid 760fe44e8c aco: pass vars by const & 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3935>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3935>
 2020-03-02 13:18:49 +00:00
Albert Astals Cid 2521c81c9e aco: Minor optimization in spill_ctx constructor 
'register_demand' is passed by value and only copied once; consider moving it to avoid unnecessary copies

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3968>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3968>
 2020-03-02 12:21:03 +00:00
Samuel Pitoiset d555794f30 radv: update entrypoints generation from ANV 
It's a massive rework loosely based on ANV. This introduces separate
dispatch tables for the instance, physical device and device objects.

This will help for implementing internal driver layers for SQTT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3930>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3930>
 2020-03-02 11:51:43 +00:00
Samuel Pitoiset 79d4d2807f radv/sqtt: add support for GFX10 
All SQTT registers were moved to privileged space on GFX10, to emit
them we need a workaround with COPY_DATA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
 2020-03-02 12:23:43 +01:00
Samuel Pitoiset eea3912451 ac/registers: add definitions for thread trace on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
 2020-03-02 12:23:39 +01:00
Samuel Pitoiset fedbc4c929 radv/sqtt: update SPI_CONFIG_CNTL.EXP_PRIORITY_ORDER value 
It should be 3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
 2020-03-02 12:23:37 +01:00
Samuel Pitoiset 36768eee9a radv/sqtt: do not assume that the number of shader engines is 4 
It's not always 4, for example on RAVEN there is only one.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
 2020-03-02 12:23:35 +01:00
Samuel Pitoiset 1b565e56e9 radv/rgp: adjust trace memory/shader clocks to fix frame duration 
To report microseconds instead of clocks.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
 2020-03-02 12:23:33 +01:00
Tapani Pälli fbd61b3fb6 mesa/st: fix formats required for EXT_texture_norm16 
Earlier commit did not take in to account that lists required for
rendering and texturing are parsed separately. This commit simply
removes formats added to the other list.

Fixes: de4eb9a3bb ("mesa/st: toggle EXT_texture_norm16 based on format support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
 2020-03-02 10:53:44 +00:00
Andreas Baierl e58bb417b5 lima: Add etc1 support 
Layer stride has to be divided by 4. We also have to take care of
the array_size when returning the bo_size.

Drop the affected tests from the fails list.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>
 2020-03-02 10:33:06 +00:00
Lionel Landwerlin 85457e350d intel/tools/dump_gpu: fix getparam values 
Don't return the pci_id for all params

Fixes: 76bf38eaf0 ("intel/tools/aub_dump: move aub file initialization to maybe_init()")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3994>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3994>
 2020-03-02 08:24:40 +00:00
Ilia Mirkin 5306b662dd mesa: fix _mesa_draw_nonzero_divisor_bits to return nonzero divisors 
The bitmask is _EffEnabledNonZeroDivisor, so no need to invert it before
returning.

Fixes: fd6636ebc0 (st/mesa: simplify determination whether a draw needs min/max index)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4009>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4009>
 2020-03-01 23:16:36 +00:00
Samuel Pitoiset 02f3af2ad1 radv: fix size of sqtt_file_chunk_asic_info on 32-bit system 
The struct is actually 716 bytes, but on 64-bit systems the compiler
aligns it to 720. Add padding to make sure it's always 720.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2580
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2578
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
 2020-02-29 05:54:54 +00:00
Samuel Pitoiset 33f604a331 radv: fix 32-bit build failure in radv_queue_internal_submit() 
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2580
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2578
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
 2020-02-29 05:54:54 +00:00