iris: Wait for the GPU to be idle before invalidating the aux table.

An end of pipe sync seems to satisfy this restriction. It takes care of
GPU hangs seen in dEQP-GLES31.functional.copy_image.* tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
This commit is contained in:
Rafael Antognolli
2020-02-25 15:08:32 -08:00
committed by Marge Bot
parent a7de6f1321
commit b4ddc6139b
+12
View File
@@ -5119,6 +5119,18 @@ genX(invalidate_aux_map_state)(struct iris_batch *batch)
return;
uint32_t aux_map_state_num = gen_aux_map_get_state_num(aux_map_ctx);
if (batch->last_aux_map_state != aux_map_state_num) {
/* HSD 1209978178: docs say that before programming the aux table:
*
* "Driver must ensure that the engine is IDLE but ensure it doesn't
* add extra flushes in the case it knows that the engine is already
* IDLE."
*
* An end of pipe sync is needed here, otherwise we see GPU hangs in
* dEQP-GLES31.functional.copy_image.* tests.
*/
iris_emit_end_of_pipe_sync(batch, "Invalidate aux map table",
PIPE_CONTROL_CS_STALL);
/* If the aux-map state number increased, then we need to rewrite the
* register. Rewriting the register is used to both set the aux-map
* translation table address, and also to invalidate any previously