AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
133,465 Commits 1 Branch 0 Tags
b4ffbf152137d24b20bb24dbbaa7945fd706970d
Commit Graph

133465 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Jason Ekstrand b4ffbf1521 intel/fs: Allow compute dispatch without a pushed subgroup ID on Gen12-HP 
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
 2021-01-13 13:10:27 -08:00
Jordan Justen 9294193098 intel/compiler: Disable push constants on gen12-hp 
We currently don't use push constants with the COMPUTE_WALKER command.
Make all uniforms to be pull constants.

The local group id previously was a push constant, but is now
available in R0.2[7:0].

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
 2021-01-13 13:10:27 -08:00
Jason Ekstrand b7c1ad00fc intel/tools: Decode COMPUTE_WALKER 
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
 2021-01-13 13:10:27 -08:00
Jordan Justen cdc9e22a3a intel/genxml/gen125: Add CFE_STATE and COMPUTE_WALKER 
Reworks:
 * Jason: Captalize COMPUTE_WALKER::BTD mode
 * Jason: Make COMPUTE_WALKER::InlineData an array
 * Jason: Remove stale fields, uint=>bool, add missing enum values.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
 2021-01-13 13:10:27 -08:00
Dylan Baker 9149d71bb6 docs: update calendar for 21.0.0-rc1 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8478>
 2021-01-13 20:25:25 +00:00
Dylan Baker 68b1e7b234 docs: update calendar and link releases notes for 20.3.3 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8478>
 2021-01-13 20:25:25 +00:00
Dylan Baker 60ffde5994 docs: Add sha256sum for 20.3.3 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8478>
 2021-01-13 20:25:25 +00:00
Dylan Baker 1a20041361 docs: add release notes for 20.3.3 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8478>
 2021-01-13 20:25:25 +00:00
Boris Brezillon 86101cdad7 panfrost: Don't skip the test with a 4k shader 
Commit bfcdc8f174 ("pan/bi: Add some zero bytes after shaders on
Bifrost") should have fixed the problem.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8470>
 2021-01-13 19:17:33 +00:00
Rhys Perry dfe429eb41 nir/loop_unroll: unroll more aggressively if it can improve load scheduling 
Significantly improves performance of a Control compute shader. Also seems
to increase FPS at the very start of the game by ~5% (RX 580, 1080p,
medium settings, no MSAA).

fossil-db (Sienna):
Totals from 81 (0.06% of 139391) affected shaders:
SGPRs: 3848 -> 4362 (+13.36%); split: -0.99%, +14.35%
VGPRs: 4132 -> 4648 (+12.49%)
CodeSize: 275532 -> 659188 (+139.24%)
MaxWaves: 986 -> 906 (-8.11%)
Instrs: 54422 -> 126865 (+133.11%)
Cycles: 1057240 -> 750464 (-29.02%); split: -42.61%, +13.60%
VMEM: 26507 -> 61829 (+133.26%); split: +135.56%, -2.30%
SMEM: 4748 -> 5895 (+24.16%); split: +31.47%, -7.31%
VClause: 1933 -> 6802 (+251.89%); split: -0.72%, +252.61%
SClause: 1179 -> 1810 (+53.52%); split: -3.14%, +56.66%
Branches: 1174 -> 1157 (-1.45%); split: -23.94%, +22.49%
PreVGPRs: 3219 -> 3387 (+5.22%); split: -0.96%, +6.18%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6538>
 2021-01-13 18:54:18 +00:00
Rob Clark 74748f16c9 freedreno/ir3: Remove legacy packed-struct encoding 
Note that we can't actually remove the packed structs themselves yet,
because tu still uses them in some hand-coded blit shaders.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:48 +00:00
Rob Clark 1a8113fdee freedreno/ir3/decode: Switch over to new disasm 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:48 +00:00
Rob Clark 668943e9f7 freedreno/ir3: Realign disasm shader stats 
To better match up with what mesa shader-db stats look like, for easier
comparision.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark 3e15ba5ccc freedreno/ir3: Better sstall estimation 
1) Take into account repeat/nop cycles
2) Clear sfu_delay after an (ss) sync

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark 11cba228fd freedreno/ir3: Small resinfo disasm tweak 
Add the 'type' field.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark 5cae4779c2 freedreno/ir3: Switch over to new encoder/decoder 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark 01e8bd55de freedreno/ir3/tests: Switch disasm test over to new decoder 
Also, uncomment the `stc` test vectors (since the new decoder decodes
these properly) and comment out an instruction which looks suspiciously
like -6.0 in hex.

This also switches the parser back to `atomic.b.op` from `atomic.op.b`
which was a short-term workaround to make it easier for the legacy
disassembler.

Also switch the binary encoding for ldib to clear b0, because the new
disassembler warns about unexpected dontcare bits (which cases the
disasm to not match).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark 704e49bae0 freedreno/hw/isa: Add expression caching 
Drops decoding an ~850KB collection of instructions from ~4min to ~1sec.

Granted for normal sized shaders, this probably doesn't matter.. but it
at reduces my cycle time for fixing things to match existing disasm
syntax using this massive collection of unique instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark 6d94f575d2 freedreno/hw/isa: Add description of ir3 ISA 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark e7630ec278 freedreno/hw: Add isaspec mechanism for documenting/defining an ISA 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark 6309c9313b freedreno/ir3: Add some new "logical" opcodes 
Once we switch over to the xml based ir3 ISA definition, the opcodes
will be decoupled from instruction encoding.  Which will let us better
handle cases where a single "opcode" (from instruction encoding stand-
point) means different things on different generations.  And also cases
like the different variations of `b`ranch instructions, which share a
single hw "opcode" plus a separate "brtype" field.  When we start using
these in ir3, we'd like to treat them as separate instructions and not
have to care about the details of how they are encoded.

For now, these are only used internally within the new xml generated
instruction encoding, but once the existing "packed struct" encoding/
decoding is replace, we'll update ir3 to start using the new opcode
enums directly (except for the `mov` variants).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark cd31bface8 freedreno/ir3: Decouple ir3_info collection from assembler 
We'll want to re-use this when cutting over to the new XML based
instruction encoding.  So untangle it from instruction packing.

Also, move handling of the appended constant data out of the
assembler, since this isn't much related to instruction encoding.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Rob Clark e1f8aaf9d2 freedreno/ir3: Fix ldg decoding/parsing 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
 2021-01-13 18:32:47 +00:00
Tony Wasserka b603875482 aco/ra: Use PhysRegInterval for count_zero 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka c30e83cc51 aco/ra: Use PhysRegInterval for collect_vars parameters 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka 0959b7c435 aco/ra: Use PhysReg when indexing into RegisterFile's containers 
This gets rid of a lot of implicit/explicit conversions from PhysReg to
unsigned.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka c3660f4781 aco/ra: Use PhysReg for member functions of PhysRegInterval 
This replaces the various PhysReg{lb} casts that had been all over the place.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka d2d0096c0c aco/ra: Remove unused function parameter 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka d9e1375e27 aco/ra: Use std::all_of to simplify a loop 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka f7e6b61379 aco/ra: Add helpers to test for intersection/containment of reg intervals 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka 88f21ad87a aco/ra: Move commonly repeated code to a helper function 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka 8962510e38 aco/ra: Conservatively refactor get_reg_specified to use PhysRegInterval 
All expressions have been replaced by their closest equivalent. No major
simplification efforts have been made to minimize risk of regressions.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka 46c9d76134 aco/ra: Use std::all_of to simplify a loop 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka 2b3b2f7ff5 aco/ra: Use std::find_if(_not) to clean up get_reg_simple 
This makes for a more self-describing iteration behavior, and it gets rid
of the need for the duplicated "final check" at the bottom.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka ebdb362937 aco/ra: Add iterator interface for PhysRegInterval 
This enables various loops to use range-based for.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:06 +00:00
Tony Wasserka 689ce1f39d aco/ra: Remove always-false conditions 
All code paths that set "found" to true either break or return before the
loop header is reached again, so the checks are unnecessary.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:05 +00:00
Tony Wasserka 46eee40abc aco/ra: Conservatively refactor existing code to use PhysRegInterval 
All expressions have been replaced by their closest equivalent. No major
simplification efforts have been made to minimize risk of regressions.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:05 +00:00
Tony Wasserka 9bbd6162a9 aco/ra: Introduce PhysRegInterval helper class 
This mainly clarifies the semantics of register bounds (inclusive vs
exclusive), and further groups related varaibles together to clarify
sliding-window-style loops.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:05 +00:00
Tony Wasserka 67c1f32228 aco/ra: Update register use bounds before recursing in get_regs_for_copies 
Delaying the call to adjust_max_used_regs until after get_regs_for_copies
returns puts the RA context into a state where registers past max_used_gpr
may be blocked. This isn't an issue on its own, but it adds a surprising
corner case to get_reg_simple that is easily avoided now.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7799>
 2021-01-13 18:21:05 +00:00
Daniel Schürmann 288032a873 aco: remove divergent branches which only jump over very few instructions 
Totals from 18436 (13.23% of 139391) affected shaders (NAVI10):
CodeSize: 138428504 -> 138172588 (-0.18%)
Instrs: 26605127 -> 26541176 (-0.24%)
Cycles: 1624994088 -> 1622461620 (-0.16%)
VMEM: 3689892 -> 3689102 (-0.02%)
SMEM: 1131767 -> 1131761 (-0.00%)
Branches: 851796 -> 787852 (-7.51%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7814>
 2021-01-13 18:04:28 +00:00
Daniel Schürmann 412291ddef aco: propagate swizzles when optimizing packed clamp & fma 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann 6ecbccfb23 aco: optimize v_pk_fma_f16 -> v_pk_fmac_f16 on GFX10 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann b03be30e07 aco: optimize packed fneg 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann e3790fc458 aco: optimize packed clamp 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann a9fd9187e8 aco: optimize packed mul+add to v_pk_fma_f16 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann 01134b0bfe aco: simplify multiply-add combining 
When both operands of a v_sub (same apply for v_add) are mul and one
already uses clamp/omod, pick the other operand to get a chance to
combine to a MAD.

No fossils-db changes.

Co-authored-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann fcd2ef23e5 radv: vectorize 16bit instructions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann 454bbf8f23 aco: emit packed 16bit instructions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann 5ad52ac906 aco: create helpers to emit vop3p instructions 
Also make get_alu_src() capable to return
unswizzled multi-component SGPR sources.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00
Daniel Schürmann 036a369f46 aco: change usesModifiers() considering opsel_hi on packed instructions 
opsel_hi == 1 means that the high operand selects the
high bits of the input, which is the normal behavior.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
 2021-01-13 17:46:56 +00:00