AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

freedreno/ir3: Fix ldg decoding/parsing

Browse Source 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
This commit is contained in:
Rob Clark
2021-01-04 12:47:36 -08:00
committed by Marge Bot
parent b603875482
commit e1f8aaf9d2
1 changed files with 5 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/freedreno/ir3/tests/disasm.c
+5
View File
@@ -154,6 +154,11 @@ static const struct test {
INSTR_6XX(c0060006_01818001, "ldg.u32 r1.z, g[r1.z], 1"),
INSTR_6XX(c0060003_0180c269, "ldg.u32 r0.w, g[r0.w+308], 1"),
INSTR_6XX(c0020011_04c08023, "ldg.f32 r4.y, g[r0.z+r4.y], 4"), /* ldg.a.f32 r4.y, g[r0.z+(r4.y<<2)], 4 */
INSTR_6XX(c0060006_01c18017, "ldg.u32 r1.z, g[r1.z+r2.w], 1"), /* ldg.a.u32 r1.z, g[r1.z+(r2.w<<2)], 1 */
INSTR_6XX(c0060006_0181800f, "ldg.u32 r1.z, g[r1.z+7], 1"),
INSTR_6XX(c0060006_01818001, "ldg.u32 r1.z, g[r1.z], 1"),
/* TODO: We don't support disasm of stc yet and produce a stgb instead
* (same as their disasm does for other families. They're used as part
* uniforms setup, followed by a shpe and then a load of the constant that