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Author SHA1 Message Date
Rohan Garg
afb63443a0 intel/blorp: add fast clear rectangle dimensions for single sampled TILE64 CCS surfaces 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23030>
 2024-04-04 02:17:34 +00:00
Rohan Garg
8670fd6ac4 iris: slow clear higher miplevels on single sampled 8bpp resources that have TILE64 
This helps fix a number of piglit tests that exercise this
functionality, such as:
  - piglit.spec.arb_texture_rg.fbo-clear-formats
  - piglit.spec.ext_framebuffer_object.fbo-clear-formats
  - piglit.spec.ext_texture_snorm.fbo-clear-formats

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23030>
 2024-04-04 02:17:34 +00:00
Marek Olšák
772149b15a nir/opt_varyings: handle load_input_vertex 
Explicit interpolation just loads raw vertex data as-is and lets the FS do
the interpolation manually.

This adds handling of nir_intrinsic_load_input_vertex, which has 2 different
behaviors: undefined vertex ordering and strict vertex ordering.

- dead IO removed correctly
- constants and uniform expressions are propagated normally
- outputs are deduplicated within their own category (strict and non-strict)
- outputs used by explicit interpolation are never treated as "convergent"
- backward inter-shader code motion is skipped
- compaction has 2 new types of vec4 slots:
    - mixed 32-bit and 16-bit explicit strict (sharing the same vec4)
    - mixed 32-bit and 16-bit explicit non-strict (sharing the same vec4)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28247>
 2024-04-04 01:25:06 +00:00
Timur Kristóf
b9b557f2e7 aco/optimizer_postRA: Remove a check from SCC no-compare optimization. 
Not all code paths of this optimization depend on there being only
one user of the first operand; and those code paths already have
their own check for this.

Fossil DB stats on Navi 21:

Totals from 477 (0.60% of 79395) affected shaders:
Instrs: 995901 -> 995341 (-0.06%); split: -0.06%, +0.00%
CodeSize: 5218856 -> 5216816 (-0.04%); split: -0.04%, +0.00%
Latency: 16340256 -> 16338799 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 3044975 -> 3044871 (-0.00%); split: -0.00%, +0.00%
Copies: 95047 -> 95071 (+0.03%)
SALU: 150345 -> 149785 (-0.37%); split: -0.38%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28545>
 2024-04-04 00:50:11 +00:00
Ganesh Belgur Ramachandra
5b301e74ed compiler,glsl: fix warning when -finstrument-functions is used 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28411>
 2024-04-04 00:03:53 +00:00
Timur Kristóf
5fa70730da radv: Use IO semantic location for shader output info. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
f23795e78c radv: Use NIR IO semantics to determine VS input info. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
9fd67c84da radv: Remove unused VS input usage mask. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
0ddecb3f0e radv: Add helper to determine usage of VS prologs. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
5156d3097b radv: Add helper for determining per-attribute vertex buffer descriptors. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
e04f66ae33 radv: Use NIR IO semantics to determine GS output info. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
7276bea52d radv: Record PS input clip/cull mask instead of number. 
Keeping the mask instead of the actual number will make it easier
later to transition to basing the information on I/O intrinsics
instead of I/O variables.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
cbc8f5216a radv: Slightly refactor gather_intrinsic_store_output_info. 
No functional changes.
Use const more, and rename some variables to make them clearer.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
d10e458df0 radv: Extract gather_load_vs_input_info function. 
No functional changes.
Make the code look cleaner by handling the various stages
by different functions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
4e2eeab90d radv: Pass key structures to gather intrinsic info. 
No functional changes.
The information in these structures will be needed
in a later commit. Done separately to help keep that
other commit cleaner.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
 2024-04-03 23:40:33 +00:00
Timur Kristóf
c27877cff9 radv: Only add extra dword to LS-HS stride when there are LS outputs. 
Fixes: d116272689
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28544>
 2024-04-03 23:15:01 +00:00
Eric R. Smith
ad7457fe20 panfrost: mark indirect compute buffer as read 
When we dispatch an indirect compute job, the buffer containing
the indirect parameters should be marked as read (since the GPU
will read the parameters from there). Without this there's a
race condition if the CPU later updates the buffer.

Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28512>
 2024-04-03 22:54:28 +00:00
Connor Abbott
fb1c3f7f5d tu: Implement CCHE invalidation 
We need invalidate CCHE when we optimize out an invalidation of UCHE,
for example a storage image write to texture read. We missed this
earlier because of the blob's tendency to always over-flush, but the
blob does use this when building acceleration structures.

Fixes: 95104707f1 ("tu: Basic a7xx support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28445>
 2024-04-03 21:10:25 +00:00
Connor Abbott
abe9bd38ff freedreno/a7xx: Add CP_CCHE_INVALIDATE 
Fixes: 95104707f1 ("tu: Basic a7xx support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28445>
 2024-04-03 21:10:25 +00:00
José Roberto de Souza
a47a65c1c2 intel/genxml/xe2: Update definition of INTERFACE_DESCRIPTOR_DATA 
This maches specification and better matches the gfx 125 definition.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28505>
 2024-04-03 20:21:04 +00:00
José Roberto de Souza
0f29b780e1 intel/genxml/gfx125: Fix definition of INTERFACE_DESCRIPTOR_DATA::Thread group dispatch size 
It was using the wrong platform definition that only had 1 bit,
filtering by DG2/ACM it shows the correct definition.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28505>
 2024-04-03 20:21:04 +00:00
José Roberto de Souza
c00c685f84 intel/genxml: Add more instdone registers 
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28505>
 2024-04-03 20:21:04 +00:00
José Roberto de Souza
2f3dc31876 anv: Set STATE_COMPUTE_MODE mask bit when zeroing compute mode 
Justing setting all zeroes to STATE_COMPUTE_MODE will do nothing,
the mask of each register must be set for it to change.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28505>
 2024-04-03 20:21:04 +00:00
Mike Blumenkrantz
ba52fb0eca glsl: handle xfb resources for spirv before running varying opts 
this otherwise breaks lowered io

cc: mesa-stable

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28529>
 2024-04-03 19:28:18 +00:00
daoxiang.gong
6cadf5cc2d zink - Fix for minLod and maxLod when mipmap filter is disabled 
According to spec 4.6 section 8.14 (TEXTURE MINIFICATION),  λ(x, y) is clamped to minLod and maxLod first and then used to choose minification or magnification: “If λ(x, y) is less than or equal to zero the texture is said to be magnified; if it is greater, the texture is minified. “

Prior to this change, Zink hard-coded minLod and maxLod to be [0.0, 0.25]. Some problems can be seen here:

If lambda originally is 0.3, and app sets minLod = 0.0f, maxLod = 0.0f, and minFilter = Linear, magFilter = Nearest:
According to the spec, lambda is clamped to 0.0 first, so magnification should be chosen, but on Zink lambda was clamped to 0.25, minification was chosen incorrectly.

Similarly if app sets minLod = 3.0f and maxLod = 3.0f
 According to the spec, minification should be used regardless of lambda, but Zink would allow magnification if lambda was less than or equal to zero.

This is fixed by individually clamping minLod and maxLod to [0, 0.25].

Signed-off-by: daoxiang.gong <daoxiang.gong@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26933>
 2024-04-03 18:53:58 +00:00
Corentin Noël
ebfd3f2a78 zink: Removed unused num_texel_buffers member 
This member is only set but never used.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28540>
 2024-04-03 18:27:26 +00:00
Timur Kristóf
cff24443fd ac/nir/tess: Clarify when VS-TCS I/O can use registers. 
And cleanup some old ugly code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
 2024-04-03 17:37:40 +00:00
Timur Kristóf
9faabdd5dd ac/nir/tess: Remove superfluous args for reserved TCS outputs. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
 2024-04-03 17:37:40 +00:00
Timur Kristóf
ae8a954048 ac/nir/tess: Calculate reserved LDS outputs based on IO info. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
 2024-04-03 17:37:40 +00:00
Timur Kristóf
c61eb54806 ac/nir/tess: Map TCS LDS IO locations without gaps. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
 2024-04-03 17:37:40 +00:00
Timur Kristóf
a167cb9ba3 ac/nir/tess: Return undef when loading an unwritten TCS output. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
 2024-04-03 17:37:40 +00:00
Timur Kristóf
a1c821e911 ac/nir/tess: Clarify when a TCS output is stored in LDS or VRAM. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
 2024-04-03 17:37:40 +00:00
Timur Kristóf
08baefe18c ac/nir/tess: Load tess factors from variable when they are passed in registers. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
 2024-04-03 17:37:40 +00:00
Timur Kristóf
10acebf88f ac/nir: Introduce ac_nir_calc_io_offset_mapped. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
 2024-04-03 17:37:40 +00:00
Mike Blumenkrantz
3d43f8c1a1 nir/lower_wpos_ytransform: fix for lowered io 
this should now handle scalarized+lowered io correctly

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28462>
 2024-04-03 16:42:46 +00:00
Mike Blumenkrantz
1c527dab96 nir/lower_wpos_ytransform: scalarize emit_wpos_adjustment 
should be no functional changes

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28462>
 2024-04-03 16:42:46 +00:00
Mike Blumenkrantz
a9e023ed94 nir/lower_wpos_ytransform: update comment to reflect variable usage 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28462>
 2024-04-03 16:42:46 +00:00
Mike Blumenkrantz
e871424b5e nir/lower_wpos_ytransform: reuse input zw components for fragcoord rewrite 
no functional changes, these are just unchanged

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28462>
 2024-04-03 16:42:46 +00:00
Mike Blumenkrantz
e848d9b9cc nir/lower_wpos_ytransform: move new value load to start of function, reuse 
should be no functional changes

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28462>
 2024-04-03 16:42:46 +00:00
Mike Blumenkrantz
356d88d1e8 llvmpipe: fix DRAW_USE_LLVM=0 
this only supports 16 UBOs

fixes #9346

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28335>
 2024-04-03 16:08:12 +00:00
Sil Vilerino
5bb72e05d1 vl_win32_screen_create: Take ownership of winsys injected to created d3d12_screen 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28546>
 2024-04-03 14:50:28 +00:00
Sil Vilerino
37cafd53ef d3d12: Fix util_blitter_destroy destruction ordering 
Fixes: 55e377e965 ("d3d12: Add partial media, compute, graphics support with CORE and GENERIC feature levels")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28546>
 2024-04-03 14:50:28 +00:00
Sil Vilerino
0dd871442b d3d12: Fix leak dxil_module::serialized_dependency_table 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28546>
 2024-04-03 14:50:28 +00:00
Mike Blumenkrantz
24197aeb2b zink: only use location_frac for deref array indexing for compact variables 
not sure why I did this or how it ever worked?

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28466>
 2024-04-03 14:21:47 +00:00
Mike Blumenkrantz
2185da6c89 zink: fix add_derefs case for compact arrays 
only compact arrays use the aoa size as the vector length

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28466>
 2024-04-03 14:21:47 +00:00
Mike Blumenkrantz
baf96518fa zink: fix io slot calculation for vertex inputs in add_derefs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28466>
 2024-04-03 14:21:47 +00:00
Mike Blumenkrantz
460cd99ea5 zink: don't clobber indirect array reads with missing components 
this breaks interfaces where the consumer reads its input indirectly
and only some of the components are written by clobbering all
the components, even if the unwritten components are never accessed

Fixes: 459b49a174 ("zink: add a new linker pass to handle mismatched i/o components")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28466>
 2024-04-03 14:21:47 +00:00
Mike Blumenkrantz
a64f5ae9d7 zink: always check patch io during rework_io_vars 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28466>
 2024-04-03 14:21:47 +00:00
Mike Blumenkrantz
11e988fa80 zink: call gather_info during shader creation 
this is totally out of sync at this point

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28466>
 2024-04-03 14:21:47 +00:00
Mike Blumenkrantz
562cb8381e zink: track a mask of arrayed io locations on shaders 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28466>
 2024-04-03 14:21:47 +00:00