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74545 Commits

Author SHA1 Message Date
Ben Skeggs
7333b0c20c nvc0: import maxwell texture header definitions from rnndb 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:57:10 +10:00
Ben Skeggs
733c8f8c73 nv50-: split tic format specification 
We previously stored texture format information as it would appear in
the TIC.

We're about to support the new TIC layout that appeared with Maxwell,
so it makes more sense to store the data in a split-out format.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:57:07 +10:00
Ben Skeggs
a928cbc205 nv50-: remove nv50_texture.xml.h 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:57:05 +10:00
Ben Skeggs
ff1af29dd9 nvc0: switch nvc0_tex.c to updated g80_texture.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:57:03 +10:00
Ben Skeggs
c999736c18 nvc0: switch nvc0_surface.c to updated g80_texture.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:57:02 +10:00
Ben Skeggs
63880dca12 nv50: switch nv50_tex.c to updated g80_texture.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:57:00 +10:00
Ben Skeggs
a15c08c95c nv50: switch nv50_surface.c to updated g80_texture.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:58 +10:00
Ben Skeggs
59d93ad1be nv50: switch nv50_state.c to updated g80_texture.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:56 +10:00
Ben Skeggs
1a45b7afb6 nv50-: switch nv50_formats.c to updated g80_texture.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:54 +10:00
Ben Skeggs
d5ac81295d nv50: import updated g80_texture.xml.h from rnndb 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:52 +10:00
Ben Skeggs
7235b6250d nv50-: remove nv50_defs.xml.h 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:50 +10:00
Ben Skeggs
b04b16754c nv50-: switch nv50_formats.c to updated g80_defs.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:48 +10:00
Ben Skeggs
3444f83077 nv50-: improved macros to handle format specification 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:45 +10:00
Ben Skeggs
346d7a24ea nv50-: separate vertex formats from surface format descriptions 
We've previously had identical naming between vertex and texture
formats, so it mostly made sense to define these together.

However, upcoming patches are going to transition the driver over to
using updated texture header definitions using NVIDIA's naming, and this
will no longer be the case.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:42 +10:00
Ben Skeggs
3e2dd50d81 nvc0: remove unnecessary includes 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:40 +10:00
Ben Skeggs
e8eda47898 nvc0: switch nvc0_tex.c to updated g80_defs.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:38 +10:00
Ben Skeggs
546ccf3f82 nvc0: switch nvc0_surface.c to updated g80_defs.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:36 +10:00
Ben Skeggs
0a0d8e4497 nv50: remove unnecessary include 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:33 +10:00
Ben Skeggs
9c4b7748db nv50: switch nv50_transfer.c to g80_defs.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:31 +10:00
Ben Skeggs
577eeb7984 nv50: switch nv50_tex.c to updated g80_defs.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:29 +10:00
Ben Skeggs
114d41feb2 nv50: switch nv50_surface.c to updated g80_defs.xml.h 
Verified (binary diff) to produce identical code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:27 +10:00
Ben Skeggs
413cc25753 nv50: import updated g80_defs.xml.h from rnndb 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-16 15:56:12 +10:00
Nicolai Hähnle
2de9317d5f st/mesa: count shader images in MaxCombinedShaderOutputResources 
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-15 22:22:34 -05:00
Ilia Mirkin
1edbe0157d st/mesa: enable GL image extensions when backend supports them 
This enables ARB_shader_image_load_store and ARB_shader_image_size when
the backend claims support for these. It will also implicitly enable the
image component of ARB_shader_texture_image_samples.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2016-02-15 22:22:33 -05:00
Ilia Mirkin
2e0a84208b st/mesa: convert GLSL image intrinsics into TGSI 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2016-02-15 22:22:33 -05:00
Ilia Mirkin
672257dc69 st/mesa: allow st_format.h to be included from C++ files 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2016-02-15 22:22:33 -05:00
Nicolai Hähnle
ef27190a34 st/mesa: set pipe_image_view layers correctly for 3D textures 
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-15 22:22:33 -05:00
Nicolai Hähnle
f1b0bda6bc st/mesa: call st_finalize_texture from image atoms 
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2016-02-15 22:22:33 -05:00
Ilia Mirkin
78093167b1 st/mesa: add an image atom for shader images 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2016-02-15 22:22:33 -05:00
Ilia Mirkin
e2a1ec5f0f tgsi: show textual format representation 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2016-02-15 22:22:33 -05:00
Ilia Mirkin
9fbfa1abb2 gallium: add PIPE_SHADER_CAP_MAX_SHADER_IMAGES 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2016-02-15 22:22:33 -05:00
Ilia Mirkin
bceff68114 gallium: make image views non-persistent objects 
Make them akin to shader buffers, with no refcounting/etc. Just used to
pass data about the bound image in ->set_shader_images.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2016-02-15 22:22:33 -05:00
Ilia Mirkin
cfbf25ac8f st/mesa: empty buffer binding if the buffer's not really there 
This can happen with 0-sized buffers.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2016-02-15 22:22:33 -05:00
Kristian Høgsberg Kristensen
a3672a241b anv/genxml: Include MBO bits for gen7 and gen75 2016-02-15 17:57:03 -08:00
Kristian Høgsberg Kristensen
c2b2ebf1ed anv: Add missing gen75_cmd_buffer_set_subpass() prototype 2016-02-15 17:40:15 -08:00
Adam Jackson
80ec20351c anv: Bump to 1.0.3 
Probably this should be picked up from <vulkan.h> directly, or we should
just assume that any 1.0.x is legal.
 2016-02-15 17:38:26 -08:00
Kristian Høgsberg Kristensen
b53edea76c anv/gen7: Make disabling the FS work 
We disable the fragment shader for depth/stencil-only pipelines. This
commit makes that work for gen7.
 2016-02-15 17:32:07 -08:00
Kristian Høgsberg Kristensen
85f67cf16e anv: Deduplicate render pass code 
This lets us share the renderpass code and depth/stencil state code
between gen 7 and gen 8.
 2016-02-15 17:32:07 -08:00
Kristian Høgsberg Kristensen
ac4fd0ed21 anv/gen7: Fix pipeline selection in init_device_state() 
We need the 3D pipeline for the initial setup, not GPGPU.
 2016-02-15 17:32:07 -08:00
Kristian Høgsberg Kristensen
ea694637ac anv/gen7: Set 3DSTATE_SF depth buffer format correctly 
We need to pull this from the render pass information at state flush
time.
 2016-02-15 17:32:07 -08:00
Kristian Høgsberg Kristensen
18dd59538b anv/gen7: Call flush_pipeline_select_3d() from CmdBeginRenderPass 2016-02-15 17:32:07 -08:00
Kristian Høgsberg Kristensen
832f73f512 anv: Share flush_pipeline_select_3d() between gen7 and gen8 2016-02-15 17:32:07 -08:00
Kristian Høgsberg Kristensen
53eaa0a6b8 anv: Fix warning 3DSTATE_VERTEX_ELEMENTS setup 
This is a little more subtle. If elem_count is 0, nothing else happens
in this function, so we return early to avoid warning about
uninitialized 'p'.
 2016-02-15 17:32:07 -08:00
Kristian Høgsberg Kristensen
5d72d7b12d anv: Fix misc simple warnings 2016-02-15 17:32:07 -08:00
Rhys Kidd
aa82cc4b22 vc4: Add missing braces in initializer 
Silences the following GCC warning:

mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c: In function 'qir_schedule_instructions':
mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c:578:16: warning: missing braces around initializer [-Wmissing-braces]
         struct schedule_state state = { 0 };
                ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
 2016-02-15 17:13:52 -08:00
Rhys Kidd
c75ced3623 vc4: Correct typo setting 'handled_qinst_cond' 
Variable was previously always set to true. Accordingly, the later
assert() served no active purpose.

Found with GCC warning and code inspection:

mesa/src/gallium/drivers/vc4/vc4_qpu_emit.c: In function'vc4_generate_code':
mesa/src/gallium/drivers/vc4/vc4_qpu_emit.c:315:22: warning: variable 'handled_qinst_cond' set but not used [-Wunused-but-set-variable]
                 bool handled_qinst_cond = true;
                      ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
 2016-02-15 17:13:52 -08:00
Eric Anholt
655fa0f465 vc4: Don't treat conditional MOVs as raw MOV. 
The two consumers want to know that the destination will be exactly the
source, which is not true if we might not set the destination.

Signed-off-by: Eric Anholt <eric@anholt.net>
 2016-02-15 17:13:52 -08:00
Timothy Arceri
00a1bd13b5 glsl: warn in GL as well as ES when varying not written 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93339
 2016-02-16 11:15:43 +11:00
Jason Ekstrand
08ecd8a8d1 anv/meta_resolve: Set origin_upper_left on gl_FragCoord 
It's required by the spec and any shaders that don't set it will be broken.
I'm not really sure how multisampling was even working before...
 2016-02-15 12:45:03 -08:00
Ilia Mirkin
4360ba0caf mesa: need to check resource and set length even if bufSize is 0 
This fixes a number of dEQP tests, such as:

dEQP-GLES31.functional.program_interface_query.buffer_limited_query.resource_query

It was expecting the length to be set even in the bufSize == 0 case.
Also _mesa_get_program_resourceiv does some error checking on the
resource which should probably happen even in the bufSize == 0 case as
well although there's no dEQP test for that.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
 2016-02-15 12:20:25 -05:00