Commit Graph

74545 Commits

Author SHA1 Message Date
Michel Dänzer fde908444a Fix copy-and-paste-o of my e-mail address. 2006-12-14 12:57:59 +01:00
Michel Dänzer e0c9361a7c Avoid failing assertion in intel_miptree_set_image_offset() with cube maps.
Cube maps still aren't working quite correctly though.
2006-12-14 12:47:44 +01:00
Michel Dänzer 81855f22cd Fix some corner cases in i945_miptree_layout_2d().
Based on a patch from Keith Whitwell, with some further fixes.
2006-12-14 12:42:51 +01:00
Michel Dänzer 3416ef303a Share code to lay out >= 945 style 2D mipmaps between i915tex and i965 drivers.
Use the i965 version as it has some fixes over the i915tex version.
2006-12-14 12:39:38 +01:00
Michel Dänzer cc1afed671 intel_finalize_mipmap_tree: Add more conditions for rebuilding mipmap trees.
These are taken from the i965 driver and fix corruption of some mipmap levels
under some circumsances with 945 chipsets at least.

Also flush the batchbuffer after copying data between trees, or some apps fail
an assertion elsewhere.
2006-12-14 11:04:10 +01:00
Michel Dänzer 5f8a3e586f intel_batchbuffer_flush: Don't assert cliprects when lock is not held.
This is a legitimate situation when copying texture data between mipmap trees.
2006-12-14 11:01:39 +01:00
Michel Dänzer 4cb09df015 intelTexSubimage: Fix last parameter for intel_miptree_image_map(). 2006-12-14 11:01:38 +01:00
Michel Dänzer 9c09259b8b _mesa_swizzle_ubyte_image: Only use single swizzle_copy call when strides match.
This fixes texture data corruption with glTexSubimage (and probably glTexImage
under some circumstances) with the texstore swizzle path.
2006-12-14 11:01:38 +01:00
Ben Skeggs 99878298da Improve SwapBuffers a bit. 2006-12-14 04:34:38 +00:00
Ben Skeggs c95557f48b 0x4497 doesn't have NV30_TCL_PRIMITIVE_3D_NORMALIZE_ENABLE 2006-12-14 04:12:05 +00:00
Ben Skeggs 15c7e8896b Some more voodoo to get 3D going with a minimal initial context. 2006-12-14 03:24:57 +00:00
Brian 2a9950dcb3 Remove unneeded -I directories (3Dlabs headers). 2006-12-13 19:20:45 -07:00
Roland Scheidegger 2956a0c8a8 submit vertex weights to make World of Warcraft maybe happy (bug 8250)
submit the vertex weights to hw, which will enable broken vertex programs
errorneously using them to work. Note however that this will only work
if glWeight is used, there is no code in mesa at all to deal with weight
vertex array (glWeightPointerARB).
2006-12-14 00:34:44 +01:00
Brian 2cbfbcd972 Obsolete. 2006-12-13 15:38:07 -07:00
Brian 33ae886bbd Remove unused 3Dlabs code. 2006-12-13 15:36:26 -07:00
Brian aed4f2cc2c Remove unused 3Dlabs code. 2006-12-13 15:36:00 -07:00
Brian 05dab5eaa2 Checkpoint GLSL compiler work. Add new sources, remove obsolete. 2006-12-13 15:34:10 -07:00
Brian 1fbb1c8d78 Obsolete. 2006-12-13 15:33:41 -07:00
Brian a5011d9753 Not needed. 2006-12-13 15:33:09 -07:00
Brian 8dcfcad7a2 Move all the code for computing ctx->_TriangleCaps into state.c.
ctx->_TriangleCaps should probably go away altogether someday...
2006-12-13 15:31:14 -07:00
Brian cefc983bec Retire old GLSL shader code. 2006-12-13 15:06:28 -07:00
Brian 12ef1fbefc Checkpoint for GLSL compiler changes.
In brief:
Check for enabled fragment program by looking at ctx->FragmentProgram._Current.
New code for varying variables.
2006-12-13 15:05:23 -07:00
Brian a328e469d3 Checkpoint work for new GLSL compiler back-end.
Among changes:
Remove ctx->FragmentProgram._Active
Remove _UseTexEnvProgram
Move _MaintainTnlProgram, _MaintainTexEnvProgram, _TexEnvProgram and
_TnlProgram fields.
Remove/disable old GLSL interpreter code.
2006-12-13 14:58:13 -07:00
Brian fe1d01cb39 Checkpoint of work for new GLSL compiler back-end. Lots of assorted changes. 2006-12-13 14:54:47 -07:00
Brian 8627bf1452 Rewrite/simplify most built-in functions to use updated set of __asm instructions. 2006-12-13 14:49:41 -07:00
Nian Wu 77b862a849 Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline 2006-12-13 13:49:00 -08:00
Brian aff8e204d2 Checkpoint new GLSL compiler back-end to produce fp/vp-style assembly instructions. 2006-12-13 14:48:36 -07:00
Zou Nan hai ed7fbad206 Fix bug #93, i965 driver not thread safe.
I am not confident of it is 100% thread safe now.
  bufmgr_fake.c need a total rewrite later
(cherry picked from 606632ca27558ee1335be2f4a5906f2baa240a6a commit)
2006-12-13 13:29:37 -08:00
Zou Nan hai 4720cd0050 fix bug #99.
prim_count overflow when there is more than 1 cliprect
(cherry picked from 84b958d66fe7d3fe03ed12b493e3f3197f656531 commit)
2006-12-13 13:29:20 -08:00
Zou Nan hai aeda4c589a ARB_occlusion_query support 2006-12-13 13:25:12 -08:00
Zou Nan hai 696fe3f52e if (tex width < 4), mipmap calculation will be out of range 2006-12-13 13:24:35 -08:00
George Sapountzis 5b35132b41 Bug 7260: mach64 texture memory mng cleanup
mach64 uses its own set of texture memory management routines which are buggy,
running a second DRI client kills the first one. This patch ports mach64 code
to the stock dri texture managment code.
2006-12-12 12:51:37 +02:00
George Sapountzis c180678d92 Bug 7861: mach64 with render acceleration should restore texture state
RENDER acceleration uses texturing, thus when RENDER acceleration is enabled,
the mach64 DRI driver should restore texture state when acquiring the DRI lock.
2006-12-12 12:51:33 +02:00
George Sapountzis eed1a6de4b Bug 7790: Polygons incorrectly clipped by mach64 driver
un-break strict-aliasing rules
2006-12-12 12:51:27 +02:00
Eric Anholt 9a94dae4c2 Avoid branch instructions while in single program flow mode.
There is an errata for Broadwater that threads don't have the instruction/loop
mask stacks initialized on thread spawn.  In single program flow mode, those
stacks are not writable, so we can't initialize them.  However, they do get
read during ELSE and ENDIF instructions.  So, instead, replace branch
instructions in single program flow mode with predicated jumps (ADD to the ip
register), avoiding use of the more complicated branch instructions that may
fail.  This is also a minor optimization as no ENDIF equivalent is necessary.
2006-12-10 12:24:51 -08:00
Eric Anholt 183abbcd6b Connect INTEL_DEBUG=sync up to cmd/batch ioctls. 2006-12-10 12:24:46 -08:00
Wang Zhenyu 0536268267 adding pci id of Crestline 2006-12-10 12:24:40 -08:00
Eric Anholt d7b24fec24 i965: Fix a crash with wine by not allocating >1MB on the stack. 2006-12-09 22:35:07 -08:00
Patrice Mandin aadcf1a9ff Update spot light params also for nv20 and nv30 2006-12-08 18:56:51 +00:00
Patrice Mandin 5c80270b91 grr, always check twice before commit 2006-12-08 16:40:34 +00:00
Patrice Mandin 65c54a685a Resend spot light parameters when part of it changes 2006-12-08 16:39:12 +00:00
Ben Skeggs c04c74bc5d Skeletal extension handling across chipsets. 2006-12-08 14:12:47 +00:00
Ben Skeggs fe91d00e33 NV_44 uses nv30InitStateFuncs too 2006-12-08 12:36:26 +00:00
Ben Skeggs 046ece3a2d state cache is automagically flushed on a normal BEGIN_RING_SIZE 2006-12-08 11:51:50 +00:00
Ben Skeggs e62b2f9c2e Implement a simple nv30Clear, and make sure we get a nouveau_renderbuffer
for the depth buffer and not a Mesa renderbuffer adaptor
2006-12-08 11:45:39 +00:00
Xiang, Haihao f79360858d fix bug#9237 2006-12-08 17:05:14 +08:00
Xiang, Haihao 5449f5a975 fix bug#9045 2006-12-08 17:00:59 +08:00
Ben Skeggs bda66ac426 oops, typo 2006-12-08 07:27:39 +00:00
Ben Skeggs 011377622f Create visuals for modes the ddx provides 2006-12-08 07:15:43 +00:00
Ben Skeggs 1d6f13986c oops, we don't want this by default just yet... 2006-12-08 03:04:10 +00:00