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Author SHA1 Message Date
Marek Olšák adde1dbae5 radeonsi/gfx11: enable DCC fast clears for 8-bit and 16-bit formats 
They seem to work fine.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
 2024-04-24 19:17:10 +00:00
Marek Olšák d478693dc6 radeonsi/gfx11: don't prefetch constants in binaries into the instruction cache 
Only prefetch shader instructions. There will be more GFX versions
in that list.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
 2024-04-24 19:17:10 +00:00
Marek Olšák 71ae7b85ed radeonsi/ci: update gfx11 failures 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
 2024-04-24 19:17:10 +00:00
Marek Olšák 665df08af4 ac/surface: constify and reindent NIR meta address-from-coord function params 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
 2024-04-24 19:17:09 +00:00
Marek Olšák cce1aa4766 ac/llvm: always trim components of texture instructions, trim DMASK 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
 2024-04-24 19:17:09 +00:00
Marek Olšák 83a601d420 ac/llvm: fix assertions for texture instructions with 16-bit LOD bias 
A16 dictates the type.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
 2024-04-24 19:17:09 +00:00
José Roberto de Souza 708b0a7c23 intel/dev: Read GFX IP version during runtime 
Starting from MTL there is registers in HW to read the IP version of
graphics, media and display IPs, those registers are called GMD.

IPs can be used in any combination to form a SOC/platform and each IP
has it own stepping/revision, making complex to track each IP stepping
using just PCI revision.

Since MTL will be supported by default by i915 KMD that don't have
a uAPI fetch IP versions, this feature will only be supported in LNL
and newer that are backed by Xe KMD.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26908>
 2024-04-24 18:06:04 +00:00
José Roberto de Souza 4d3fee0b40 intel: Sync xe_drm.h 
Sync xe_drm.h with 31ced035ecde ("drm/xe/uapi: Restore flags VM_BIND_FLAG_READONLY and VM_BIND_FLAG_IMMEDIATE").

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26908>
 2024-04-24 18:06:04 +00:00
Tomeu Vizoso a78e98f18e etnaviv/nn: Keep track of the sign bit when decrementing to zero 
To avoid underflow.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28879>
 2024-04-24 17:47:44 +00:00
Tomeu Vizoso 9bac40b796 etnaviv/nn: Don't shortcut ZRL bits calculation 
In some (probably malformed) cases, even weights BOs for strided or depthwise
convolutions can become bigger when using ZRL compression.

To avoid running out of space in the BO, play safe and calculate the
actual optimum ZRL bit count. This does slow compilation for quite a
bit, though (2x slower for MobileNetV1).

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28879>
 2024-04-24 17:47:44 +00:00
Tomeu Vizoso d46e68c89a etnaviv/nn: Enable image cache 
By using the on-chip SRAM to cache the input image we can save some more
bandwidth and increase the utilization of the NN cores, with the
following improvements:

MobileNetV1: 9.991ms -> 6.2ms
SSDLite MobileDet: 27ms -> 24.3ms

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28879>
 2024-04-24 17:47:44 +00:00
Tomeu Vizoso d6045ca502 etnaviv/nn: Move unused field to its right place in the struct 
The blob sets it in some cases, but doesn't seem to make any difference.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28879>
 2024-04-24 17:47:44 +00:00
Tomeu Vizoso c75b512673 etnaviv/nn: Fix calculation of remaining out channels 
We were wrongly counting the remaining number of output channels in the
last superblock, when the former isn't divisible by the latter.

MobileNetV1: 9.991ms -> 9.991ms
SSDLite MobileDet: 32.692ms -> 27ms

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28879>
 2024-04-24 17:47:44 +00:00
Tomeu Vizoso baebd6f43d etnaviv/nn: Ensure tile_y is > 0 
A zero tile dimension doesn't make sense.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28879>
 2024-04-24 17:47:44 +00:00
Tomeu Vizoso e70ea63a17 teflon: Enable convolutions with number of output channels not divisible by 8 
This was an old restriction during initial development which isn't
needed any more, and gives us a speed bump.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28879>
 2024-04-24 17:47:44 +00:00
José Roberto de Souza b143823727 intel/tools: Parse INSTDONE registers in Xe KMD error dump 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28722>
 2024-04-24 17:07:50 +00:00
José Roberto de Souza c221ba6f75 intel/decoder: Add intel_print_group_custom_spacing() 
This function has 2 additional parameters to set spacing before
printing register group dword or individual registers.

intel_print_group() is keept with the same spacing as before so no
changes on decoder output is expected here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28722>
 2024-04-24 17:07:50 +00:00
José Roberto de Souza 94deb24e2b intel/tools/aubinator_error_decode: Move definition of option_color to header 
Xe parser will also need to use the option_color parameter.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28722>
 2024-04-24 17:07:50 +00:00
Rohan Garg 7e5628749c anv: use u_foreach_bit to iterate over the the view mask like we do for transition_clear_color 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28629>
 2024-04-24 16:42:07 +00:00
Rohan Garg 5efecc9782 anv: Enable HiZ on multi-LOD depth buffers. 
Initial work by Rafael Antognolli <rafael.antognolli@intel.com>

Reworks
 - Rebase to main
 - Emit the right hiz op for higher mip levels when transitioning the
   depth buffer

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28629>
 2024-04-24 16:42:06 +00:00
Martin Roukala (né Peres) 599e8bf921 ci/valve: remove the traces runner 
This script is severely outdated and has had no use in literal years.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28902>
 2024-04-24 15:46:32 +00:00
Martin Roukala (né Peres) a589225827 ci/b2c: allow setting the DTB to be used 
This will be used by upcoming new CI jobs.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28902>
 2024-04-24 15:46:32 +00:00
Martin Roukala (né Peres) 2d442fc014 ci/b2c: rename .deqp-test-valve into .b2c-deqp-test 
Let's remove the mention of Valve and instead focus on the b2c/ci-tron
origin.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28902>
 2024-04-24 15:46:32 +00:00
Martin Roukala (né Peres) b084dbd44f ci/b2c: rename .b2c-test-{vk,gl} to .b2c-x86_64-test-{vk,gl} 
This will allow us to introduce non-x86_64 testing using CI-tron.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28902>
 2024-04-24 15:46:32 +00:00
Philipp Zabel e2444ad6c1 etnaviv/nn: Extend post-multiplier for v8 architecture 
The post-multiplier was extended by 8 bits for improved precision.
The shift offset appears to have changed as well.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28878>
 2024-04-24 15:26:37 +00:00
Philipp Zabel c2290843df etnaviv: Add nn_core_version field to etna_specs 
Use the NN_XYDP0 and NN_VIP7 feature flags to determine the NN core
version [1] and store it in etna_specs.

[1] https://github.com/nxp-imx/linux-imx/blob/lf-6.1.36-2.1.0/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_func.c#L5464-L5465

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28878>
 2024-04-24 15:26:37 +00:00
Philipp Zabel db2d5a0103 etnaviv: hwdb: Add VIP_V7 and NN_XYDP0 feature bits 
These can be used to detect the NN core architecture version [1].

[1] https://github.com/nxp-imx/linux-imx/blob/lf-6.1.36-2.1.0/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_func.c#L5464-L5465

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28878>
 2024-04-24 15:26:37 +00:00
Mike Blumenkrantz 588c762936 zink: preserve/merge variable names when generating new variables 
in the case where multiple variables get merged into one, try to use
all the names when creating new vars

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28814>
 2024-04-24 12:36:00 +00:00
Mike Blumenkrantz cb597cb85e nir/print: print io instr->name if available 
this will always be more accurate than trying to find the name from
a variable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28814>
 2024-04-24 12:35:59 +00:00
Mike Blumenkrantz 948126368a nir/clone: preserve intrinsic name field across clones 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28814>
 2024-04-24 12:35:59 +00:00
Mike Blumenkrantz 5303785bb9 nir/lower_io_to_scalar: preserve variable names when splitting io 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28814>
 2024-04-24 12:35:59 +00:00
Mike Blumenkrantz 3541ed8502 nir: store variable names to io instrs during io lowering 
this creates a reference between variables and their access instrs
before the variables are deleted, which improves debugging

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28814>
 2024-04-24 12:35:59 +00:00
Philipp Zabel dbe2927472 etnaviv: Avoid duplicate query of ETNA_GPU_FEATURES_0 parameter 
With the new hwdb, ETNA_GPU_FEATURES_0 were already queried inside
etna_gpu_new(). Use the stored PIPE_3D feature bit to determine
compatible cores.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28877>
 2024-04-24 12:13:49 +00:00
Philipp Zabel 4f123a7951 etnaviv: common: Add PIPE_3D feature bit 
With this, we can drop the duplicated ETNA_GPU_FEATURES_0 query in
screen_create().

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28877>
 2024-04-24 12:13:49 +00:00
Connor Abbott ff155f46a3 freedreno/a7xx: Register updates from kgsl 
Will be necessary for kernel changes to match kgsl.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28883>
 2024-04-24 11:29:01 +00:00
Samuel Pitoiset 59d3a8ea07 ci: uprev CTS to 1.3.8.2 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28871>
 2024-04-24 10:48:11 +00:00
Karol Herbst cd5c9870ea rusticl/program: handle -cl-no-subgroup-ifp 
As per spec we don't have to do anything with that flag.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28873>
 2024-04-24 10:25:41 +00:00
Corentin Noël ca861e8f75 ci: Add zink-venus-lvp job 
Test Zink on Venus on Lavapipe.

Acked-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27790>
 2024-04-24 09:01:15 +00:00
Corentin Noël e9dacca3f7 ci: Allow to pass LIBGL_ALWAYS_SOFTWARE to the guest environment 
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27790>
 2024-04-24 09:01:15 +00:00
Iago Toral Quiroga 708a635902 broadcom/ci: document external causes for some CTS 1.3.8 failures 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28891>
 2024-04-24 06:59:53 +00:00
Yonggang Luo 1de805e986 nouveau: Fixes error: unused import: crate::nvh_classes_cl906f::* 
Full error message:
error: unused import: `crate::nvh_classes_cl906f::*`
   --> src/nouveau/headers/lib.rs:184:9
    |
184 | pub use crate::nvh_classes_cl906f::*;
    |         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
    |
    = note: `-D unused-imports` implied by `-D warnings`
    = help: to override `-D warnings` add `#[allow(unused_imports)]`

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28855>
 2024-04-24 06:37:39 +00:00
Yiwei Zhang 4fc3f11545 venus: fix VkDeviceGroupSubmitInfo::deviceMask for feedback cmds 
Unlike sync2, a legacy deviceMask of zero is indeed to skip.

Fixes: 80f532a636 ("venus: fix VkDeviceGroupSubmitInfo cmd counts from feedback")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28888>
 2024-04-24 02:43:46 +00:00
Sagar Ghuge 46e4354940 intel/compiler: Disassemble mlen/rlen/ex_mlen in units of registers 
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28637>
 2024-04-23 23:46:26 +00:00
Caio Oliveira ff89e83178 intel/brw: Lower VGRFs to FIXED_GRFs earlier 
Moves the lowering of VGRFs into FIXED_GRFs from the code generation
to (almost) right after the register allocation.

This will allow: (1) later passes not worry about VGRFs (and what they
mean in a post reg alloc phase) and (2) make easier to add certain
types of validation post reg alloc phase using the backend IR.

Note that a couple of passes still take advantage of seeing "allocated
VGRFs", so perform lowering after they run.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28604>
 2024-04-23 23:17:57 +00:00
Caio Oliveira 5b3d4c757d intel/brw: Support FIXED_GRF when generating code for CLUSTER_BROADCAST 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28604>
 2024-04-23 23:17:57 +00:00
Pierre-Eric Pelloux-Prayer b926cd3dd9 radv: don't use python 3.9 feature in radv_annotate_layer_gen.py 
This commit adds an implementation of removesuffix so we don't
need the 'str' one which was added in 3.9.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28831>
 2024-04-23 22:45:51 +00:00
Pierre-Eric Pelloux-Prayer 27a3880ada aco: don't use python 3.7+ feature in aco_opcodes.py 
Use the suggestion from https://stackoverflow.com/questions/11351032/named-tuple-and-default-values-for-optional-keyword-arguments
so the script works on older Python.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28831>
 2024-04-23 22:45:51 +00:00
Sagar Ghuge fe4f6dd18f isl: Update shader channel select for missing components 
Bspec 57023: RENDER_SURFACE_STATE::Shader Channel Select Red

   "For channels not present in the surface format, the corresponding
   Surface Channel Select is either SCS_ZERO or SCS_ONE."

This restriction applies to alpha channel as well if an associated
resource is not used as a render target.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28791>
 2024-04-23 22:08:30 +00:00
Sagar Ghuge 2d8686ccd5 isl: Update isl_swizzle_supports_rendering comment 
Bspec 57023: RENDER_SURFACE_STATE:: Shader Channel Select Red

   "Render Target messages do not support swapping of colors with
   alpha. The Red, Green, or Blue Shader Channel Selects do not
   support SCS_ALPHA. The Shader Channel Select Alpha does not support
   SCS_RED, SCS_GREEN, or SCS_BLUE."

Cc: mesa-stable
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28791>
 2024-04-23 22:08:30 +00:00
Mike Blumenkrantz 3a868970a2 zink: disable command reordering for compute-only contexts 
this is pointless

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28880>
 2024-04-23 21:45:40 +00:00