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ac/surface: constify and reindent NIR meta address-from-coord function params

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
This commit is contained in:
Marek Olšák
2024-04-11 11:59:42 -04:00
committed by Marge Bot
parent cce1aa4766
commit 665df08af4
2 changed files with 43 additions and 43 deletions
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54
src/amd/common/ac_surface.c
View File

@@ -3385,12 +3385,12 @@ void ac_surface_print_info(FILE *out, const struct radeon_info *info,
}
static nir_def *gfx10_nir_meta_addr_from_coord(nir_builder *b, const struct radeon_info *info,
struct gfx9_meta_equation *equation,
int blkSizeBias, unsigned blkStart,
nir_def *meta_pitch, nir_def *meta_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor,
nir_def **bit_position)
const struct gfx9_meta_equation *equation,
int blkSizeBias, unsigned blkStart,
nir_def *meta_pitch, nir_def *meta_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor,
nir_def **bit_position)
{
nir_def *zero = nir_imm_int(b, 0);
nir_def *one = nir_imm_int(b, 1);
@@ -3440,11 +3440,11 @@ static nir_def *gfx10_nir_meta_addr_from_coord(nir_builder *b, const struct rade
}
static nir_def *gfx9_nir_meta_addr_from_coord(nir_builder *b, const struct radeon_info *info,
struct gfx9_meta_equation *equation,
nir_def *meta_pitch, nir_def *meta_height,
nir_def *x, nir_def *y, nir_def *z,
nir_def *sample, nir_def *pipe_xor,
nir_def **bit_position)
const struct gfx9_meta_equation *equation,
nir_def *meta_pitch, nir_def *meta_height,
nir_def *x, nir_def *y, nir_def *z,
nir_def *sample, nir_def *pipe_xor,
nir_def **bit_position)
{
nir_def *zero = nir_imm_int(b, 0);
nir_def *one = nir_imm_int(b, 1);
@@ -3507,11 +3507,11 @@ static nir_def *gfx9_nir_meta_addr_from_coord(nir_builder *b, const struct radeo
}
nir_def *ac_nir_dcc_addr_from_coord(nir_builder *b, const struct radeon_info *info,
unsigned bpe, struct gfx9_meta_equation *equation,
nir_def *dcc_pitch, nir_def *dcc_height,
nir_def *dcc_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *sample, nir_def *pipe_xor)
unsigned bpe, const struct gfx9_meta_equation *equation,
nir_def *dcc_pitch, nir_def *dcc_height,
nir_def *dcc_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *sample, nir_def *pipe_xor)
{
if (info->gfx_level >= GFX10) {
unsigned bpp_log2 = util_logbase2(bpe);
@@ -3527,12 +3527,12 @@ nir_def *ac_nir_dcc_addr_from_coord(nir_builder *b, const struct radeon_info *in
}
nir_def *ac_nir_cmask_addr_from_coord(nir_builder *b, const struct radeon_info *info,
struct gfx9_meta_equation *equation,
nir_def *cmask_pitch, nir_def *cmask_height,
nir_def *cmask_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor,
nir_def **bit_position)
const struct gfx9_meta_equation *equation,
nir_def *cmask_pitch, nir_def *cmask_height,
nir_def *cmask_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor,
nir_def **bit_position)
{
nir_def *zero = nir_imm_int(b, 0);
@@ -3548,11 +3548,11 @@ nir_def *ac_nir_cmask_addr_from_coord(nir_builder *b, const struct radeon_info *
}
nir_def *ac_nir_htile_addr_from_coord(nir_builder *b, const struct radeon_info *info,
struct gfx9_meta_equation *equation,
nir_def *htile_pitch,
nir_def *htile_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor)
const struct gfx9_meta_equation *equation,
nir_def *htile_pitch,
nir_def *htile_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor)
{
return gfx10_nir_meta_addr_from_coord(b, info, equation, -4, 2,
htile_pitch, htile_slice_size,

32
src/amd/common/ac_surface.h
View File

@@ -500,26 +500,26 @@ unsigned ac_get_cb_format(enum amd_gfx_level gfx_level, enum pipe_format format)
#ifdef AC_SURFACE_INCLUDE_NIR
nir_def *ac_nir_dcc_addr_from_coord(nir_builder *b, const struct radeon_info *info,
unsigned bpe, struct gfx9_meta_equation *equation,
nir_def *dcc_pitch, nir_def *dcc_height,
nir_def *dcc_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *sample, nir_def *pipe_xor);
unsigned bpe, const struct gfx9_meta_equation *equation,
nir_def *dcc_pitch, nir_def *dcc_height,
nir_def *dcc_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *sample, nir_def *pipe_xor);
nir_def *ac_nir_cmask_addr_from_coord(nir_builder *b, const struct radeon_info *info,
struct gfx9_meta_equation *equation,
nir_def *cmask_pitch, nir_def *cmask_height,
nir_def *cmask_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor,
nir_def **bit_position);
const struct gfx9_meta_equation *equation,
nir_def *cmask_pitch, nir_def *cmask_height,
nir_def *cmask_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor,
nir_def **bit_position);
nir_def *ac_nir_htile_addr_from_coord(nir_builder *b, const struct radeon_info *info,
struct gfx9_meta_equation *equation,
nir_def *htile_pitch,
nir_def *htile_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor);
const struct gfx9_meta_equation *equation,
nir_def *htile_pitch,
nir_def *htile_slice_size,
nir_def *x, nir_def *y, nir_def *z,
nir_def *pipe_xor);
#endif
#ifdef __cplusplus