Kenneth Graunke
accef5e8f5
brw: Replace fs_inst::target field with logical FB read/write sources
...
We can just specify this as a source to the logical FB read/write
opcodes. Notably FB reads had no sources before; now they have one.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297 >
2025-02-08 01:07:22 +00:00
Kenneth Graunke
32dd722ff3
brw: Replace fs_inst::last_rt with a logical control source
...
Rather than using a bit in the generic fs_inst data structure, we can
simply set a source on our logical FB write messages. (We already do
so for many other cases.)
In the repclear shader, setting this wasn't actually having an effect,
as we were setting it on a SHADER_OPCODE_SEND message which ignored it.
(We had already correctly set the bit in the message descriptor.)
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297 >
2025-02-08 01:07:22 +00:00
Kenneth Graunke
fce01b8461
brw: Drop FB_WRITE_LOGICAL_SRC_DST_DEPTH source
...
This was used for legacy depth passthrough on older hardware. Gfx9+
doesn't actually have dst depth as part of the message, which is the
only hardware brw supports these days.
It sure looks like we were setting it though...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297 >
2025-02-08 01:07:22 +00:00
Kenneth Graunke
7390d6189c
brw: Replace fs_inst::pi_noperspective with a logical control source
...
We already have logical pixel interpolator messages that get lowered
to send messages. We can just add an extra boolean source to those
opcodes rather than sticking a opcode-specific boolean in the generic
fs_inst data structure.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297 >
2025-02-08 01:07:22 +00:00
Kenneth Graunke
168ac07ffd
brw: Eliminate fs_inst::shadow_compare
...
brw_lower_logical_sends can just check for the TEX_LOGICAL_SRC_SHADOW_C
source; we don't need a generic instruction bit for this. We used to
have one because this was handled in the generator for older hardware
before the advent of logical opcode lowering.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297 >
2025-02-08 01:07:22 +00:00
Kenneth Graunke
df836ee895
brw: Drop unused defines
...
Nothing uses these.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297 >
2025-02-08 01:07:22 +00:00
Lionel Landwerlin
4f73689d9a
anv: add source hashes for BVH building shaders
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33432 >
2025-02-07 07:27:54 +00:00
Caio Oliveira
b50c925bd6
intel/brw: Fold simple_allocator into the shader
...
This was originally turned into a separate struct for reuse between vec4
and fs backends, that's not needed anymore.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33334 >
2025-02-06 08:33:03 -08:00
Caio Oliveira
f82bcd56fc
intel/brw: Add functions to allocate VGRF space
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33334 >
2025-02-06 08:33:03 -08:00
Caio Oliveira
5c717e68ce
intel/brw: Pass fs_visitor around instead of the simple_allocator
...
In preparation for getting rid of the simple_allocator.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33334 >
2025-02-06 08:33:03 -08:00
Caio Oliveira
75b77382b8
intel/brw: Remove offsets and total_size from VGRF allocator
...
Information was used for vec4 backend, not used here anymore.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33334 >
2025-02-06 08:33:03 -08:00
Caio Oliveira
ea87bab4ce
intel/brw: Remove 'using namespace brw' directives
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33418 >
2025-02-06 07:58:55 -08:00
Sagar Ghuge
76bd7f9265
blorp: Enable SimpleFloatBlendEnable on Xe3+
...
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32739 >
2025-02-05 22:27:54 -08:00
Sagar Ghuge
046b8717af
anv: Enable simpleFloatBlendEnable on Xe3+
...
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32739 >
2025-02-05 22:27:54 -08:00
Sagar Ghuge
efeeae3926
intel/genxml: Update BLEND_STATE_ENTRY structure
...
This change adds the SimpleFloatBlendEnable field to the structure.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32739 >
2025-02-05 22:27:54 -08:00
Caio Oliveira
1ade9a05d8
intel/brw: Use brw prefix instead of namespace for analysis implementations
...
Also drop the 'fs' prefix when applicable.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:07 +00:00
Caio Oliveira
2b92eb0b2c
intel/brw: Use brw prefix instead of namespace for dep analysis enum
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:07 +00:00
Caio Oliveira
e2f354587d
intel/brw: Merge brw_ir_analysis.h into brw_analysis.h
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:07 +00:00
Caio Oliveira
c943fb0c20
intel/brw: Move analysis passes without own file to brw_analysis.cpp
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:06 +00:00
Caio Oliveira
0f7eb96af8
intel/brw: Move idom_tree declaration to brw_analysis.h
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:06 +00:00
Caio Oliveira
0ebb75743d
intel/brw: Use brw_analysis prefix for performance analysis files
...
Move declaration to the common header and rename definition file.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:06 +00:00
Caio Oliveira
6a23749332
intel/brw: Use brw_analysis prefix for def analysis file
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:06 +00:00
Caio Oliveira
e0614e8ea1
intel/brw: Use brw_analysis prefix for liveness analysis files
...
Move declaration to the common header and rename definition file.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:06 +00:00
Caio Oliveira
e5369540ea
intel/brw: Add brw_analysis.h
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048 >
2025-02-05 21:47:06 +00:00
Alyssa Rosenzweig
bf48eae1f9
nir: drop printf_base_identifier
...
superseded.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33380 >
2025-02-05 20:33:15 +00:00
Alyssa Rosenzweig
e3bc6eafc8
nir/lower_printf: hash format strings in nir_printf_fmt
...
Lionel added a neat debugging tool. Let's make it work with the new-style
hashing approach too, since nir_printf_fmt is a lot more convenient than needing
to define a dedicated CL function to access printf (although that works too).
We remove the old non-hashed path, because it has no more functional users --
hashing is a hard requirement with vtn_bindgen2, which Intel has now switched
to.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33380 >
2025-02-05 20:33:15 +00:00
Alyssa Rosenzweig
41eabbadfa
intel: port to u_printf context + singleton
...
this is required with vtn_bindgen2. fixes printf there.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33380 >
2025-02-05 20:33:15 +00:00
Alyssa Rosenzweig
9429d001b9
intel/nir_lower_printf: modernize nir
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33380 >
2025-02-05 20:33:15 +00:00
Alyssa Rosenzweig
03ff5b2c03
intel: drop nir_lower_printf calls
...
this is now handled in vtn_bindgen2 for vtn path code. this does drop support
from printf from GRL but that seems appropriate at this point.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33380 >
2025-02-05 20:33:15 +00:00
Valentine Burley
e192d7d615
intel/ci: Update expectations for Xe
...
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33282 >
2025-02-05 14:01:03 +00:00
Valentine Burley
12ddff54ba
intel/ci: Use INTEL_XE_IGNORE_EXPERIMENTAL_WARNING to reduce warnings
...
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33282 >
2025-02-05 14:01:03 +00:00
Valentine Burley
0d1fa0f1a3
intel/dev: Provide a toggle to avoid warnings about unsupported devices
...
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33282 >
2025-02-05 14:01:03 +00:00
Valentine Burley
fcd5d25888
intel/ci: Load Xe instead of i915 on ADL
...
Xe doesn't probe on ADL without being explicitly forced through cmdline
arguments.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33282 >
2025-02-05 14:01:03 +00:00
Valentine Burley
f736f19642
intel/ci: Drop redundant BOOT_METHOD variables
...
The BOOT_METHOD is defined in .intel-common-test, which every Intel
job inherits, including the zink jobs.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33282 >
2025-02-05 14:01:03 +00:00
Lionel Landwerlin
a8b84e1898
anv: use A64 messages for push constants loads on Gfx12.5+
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:04 +00:00
Lionel Landwerlin
5c17299084
brw: enable A64 pulling of push constants
...
This will be useful for pulling constants in device bound shaders. A64
allows us to put the constants anywhere.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:04 +00:00
Lionel Landwerlin
0808125914
brw/anv: rework push constants for mesh/task shaders
...
Now using the same model as the compute shader.
As a result we temporarily disable the use of the Inline register for
providing push constants on Task & Mesh shaders. Since that register
is also available on the compute shader we'll try to find a way to use
the same mechanism for all 3 shaders in another MR and bring back that
optimization.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:04 +00:00
Lionel Landwerlin
a77e532248
anv: add a helper for getting gfx push constant addresses
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:03 +00:00
Lionel Landwerlin
26347b4876
anv: use heap size to program generate state heap
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:03 +00:00
Lionel Landwerlin
ddf64a7d95
anv: track the first 2MB of unused VA
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:03 +00:00
Lionel Landwerlin
48e41c87b0
anv: increase general state pool
...
We'll start store more push constants in there.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:03 +00:00
Lionel Landwerlin
75e09c4ff3
anv: reuse helper for compute push constants
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:03 +00:00
Lionel Landwerlin
c08b437db7
brw: fixup scoreboarding for find_live_channels
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32895 >
2025-02-05 09:56:03 +00:00
Tapani Pälli
4a41564619
intel/common: fix mi_builder_test issue
...
Fixes intel_gfx20_mi_builder_test failures on LNL.
Fixes: bb31287d24 ("intel: Initialize upper 32bits of drm_xe_sync.handle")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33366 >
2025-02-04 12:57:19 +00:00
Tapani Pälli
4064b5546b
intel/dev: reduce warning noise from urb settings
...
This sets up the min value as if stage was active, later on
we set this to zero if such is not the case.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12141
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33353 >
2025-02-04 09:07:48 +00:00
Tapani Pälli
4e80045ae0
intel/genxml/anv: fix the layout of call stack handler struct
...
Patch adds new CALL_STACK_HANDLER struct which has offset to
start and end of RegistersPerThread field, this spec changes is
described in Wa_22019854901 (see HSD 22019967134).
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33342 >
2025-02-04 08:44:04 +00:00
Caio Oliveira
96de531b5a
anv: Add statistic for 'GRF registers' for Xe3+
...
For Xe3+ the registers are tightly packed to make better use of GRF
space, so add a statistic to keep track of how many registers were used.
For previous versions this is not useful since the code is spreading
the registers among the whole space.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33311 >
2025-02-04 00:33:46 +00:00
Dylan Baker
07787f3208
intel: output a depfile with mesa_clc
...
This helps Ninja to more accurately rebuild when secondary inputs
changes.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33309 >
2025-02-04 00:10:01 +00:00
Caio Oliveira
92085e7bab
intel/brw: Remove 'fs' prefix from brw_from_nir functions
...
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33330 >
2025-02-03 23:08:11 +00:00
Caio Oliveira
1332d84500
intel/brw: Rename file brw_fs_nir.cpp to brw_from_nir.cpp
...
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33330 >
2025-02-03 23:08:11 +00:00