intel/brw: Remove 'using namespace brw' directives

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33418>

src/intel/compiler/brw_analysis.cpp

@@ -7,8 +7,6 @@
 #include "brw_cfg.h"
 #include "brw_fs.h"
 
-using namespace brw;
-
 /* Calculates the immediate dominator of each block, according to "A Simple,
  * Fast Dominance Algorithm" by Keith D. Cooper, Timothy J. Harvey, and Ken
  * Kennedy.

src/intel/compiler/brw_cfg.cpp

@@ -35,8 +35,6 @@
  * blocks with successor/predecessor edges connecting them.
  */
 
-using namespace brw;
-
 static bblock_t *
 pop_stack(exec_list *list)
 {

src/intel/compiler/brw_compile_cs.cpp

@@ -17,8 +17,6 @@
 
 #include <memory>
 
-using namespace brw;
-
 static void
 fill_push_const_block_info(struct brw_push_const_block *block, unsigned dwords)
 {

src/intel/compiler/brw_compile_fs.cpp

@@ -18,8 +18,6 @@
 
 #include <memory>
 
-using namespace brw;
-
 static brw_inst *
 brw_emit_single_fb_write(fs_visitor &s, const brw_builder &bld,
                          brw_reg color0, brw_reg color1,

src/intel/compiler/brw_compile_gs.cpp

@@ -12,8 +12,6 @@
 #include "brw_private.h"
 #include "dev/intel_debug.h"
 
-using namespace brw;
-
 static const GLuint gl_prim_to_hw_prim[MESA_PRIM_TRIANGLE_STRIP_ADJACENCY+1] = {
    [MESA_PRIM_POINTS] =_3DPRIM_POINTLIST,
    [MESA_PRIM_LINES] = _3DPRIM_LINELIST,

src/intel/compiler/brw_compile_mesh.cpp

@@ -34,8 +34,6 @@
 
 #include <memory>
 
-using namespace brw;
-
 static inline int
 type_size_scalar_dwords(const struct glsl_type *type, bool bindless)
 {

src/intel/compiler/brw_compile_tcs.cpp

@@ -12,8 +12,6 @@
 #include "brw_private.h"
 #include "dev/intel_debug.h"
 
-using namespace brw;
-
 /**
  * Return the number of patches to accumulate before a MULTI_PATCH mode thread is
  * launched.  In cases with a large number of input control points and a large

src/intel/compiler/brw_compile_vs.cpp

@@ -10,8 +10,6 @@
 #include "brw_private.h"
 #include "dev/intel_debug.h"
 
-using namespace brw;
-
 static void
 brw_assign_vs_urb_setup(fs_visitor &s)
 {

src/intel/compiler/brw_from_nir.cpp

@@ -34,8 +34,6 @@
 
 #include <vector>
 
-using namespace brw;
-
 struct brw_bind_info {
    bool valid;
    bool bindless;

src/intel/compiler/brw_fs.cpp

@@ -44,8 +44,6 @@
 #include "compiler/nir/nir_builder.h"
 #include "util/u_math.h"
 
-using namespace brw;
-
 void
 fs_visitor::vfail(const char *format, va_list va)
 {

src/intel/compiler/brw_fs_thread_payload.cpp

@@ -24,8 +24,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 vs_thread_payload::vs_thread_payload(const fs_visitor &v)
 {
    unsigned r = 0;

src/intel/compiler/brw_fs_visitor.cpp

@@ -34,8 +34,6 @@
 #include "compiler/glsl_types.h"
 #include "dev/intel_device_info.h"
 
-using namespace brw;
-
 void
 fs_visitor::emit_urb_writes(const brw_reg &gs_vertex_count)
 {

src/intel/compiler/brw_lower.cpp

@@ -6,8 +6,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 /**
  * Align16 3-source instructions cannot have scalar stride w/64-bit types.
  *

src/intel/compiler/brw_lower_dpas.cpp

@@ -6,8 +6,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 static void
 f16_using_mac(const brw_builder &bld, brw_inst *inst)
 {

src/intel/compiler/brw_lower_integer_multiplication.cpp

@@ -6,8 +6,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 /**
  * Factor an unsigned 32-bit integer.
  *

src/intel/compiler/brw_lower_logical_sends.cpp

@@ -29,8 +29,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 static void
 lower_urb_read_logical_send(const brw_builder &bld, brw_inst *inst)
 {

src/intel/compiler/brw_lower_pack.cpp

@@ -26,8 +26,6 @@
 #include "brw_cfg.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 bool
 brw_lower_pack(fs_visitor &s)
 {

src/intel/compiler/brw_lower_regioning.cpp

@@ -25,8 +25,6 @@
 #include "brw_cfg.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 namespace {
    /* From the SKL PRM Vol 2a, "Move":
     *

src/intel/compiler/brw_lower_scoreboard.cpp

@@ -58,8 +58,6 @@
 #include "brw_builder.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 namespace {
    /**
     * In-order instruction accounting.

src/intel/compiler/brw_lower_simd_width.cpp

@@ -6,8 +6,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 static bool
 is_mixed_float_with_fp32_dst(const brw_inst *inst)
 {

src/intel/compiler/brw_lower_subgroup_ops.cpp

@@ -9,8 +9,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 struct brw_reduction_info {
    brw_reg             identity;
    enum opcode         op;

src/intel/compiler/brw_opt.cpp

@@ -9,8 +9,6 @@
 
 #include "dev/intel_debug.h"
 
-using namespace brw;
-
 void
 brw_optimize(fs_visitor &s)
 {

src/intel/compiler/brw_opt_address_reg_load.cpp

@@ -20,8 +20,6 @@
  *    add(1)   a0.4:UD, vgrf63+0.0<0>:UD, 192u
  */
 
-using namespace brw;
-
 static bool
 opt_address_reg_load_local(fs_visitor &s, bblock_t *block, const brw_def_analysis &defs)
 {

src/intel/compiler/brw_opt_algebraic.cpp

@@ -7,8 +7,6 @@
 #include "brw_builder.h"
 #include "util/half_float.h"
 
-using namespace brw;
-
 static uint64_t
 src_as_uint(const brw_reg &src)
 {

src/intel/compiler/brw_opt_cmod_propagation.cpp

@@ -48,8 +48,6 @@
  * exists and therefore remove the instruction.
  */
 
-using namespace brw;
-
 static bool
 cmod_propagate_cmp_to_add(const intel_device_info *devinfo, bblock_t *block,
                           brw_inst *inst)

src/intel/compiler/brw_opt_combine_constants.cpp

@@ -33,8 +33,6 @@
 #include "brw_cfg.h"
 #include "util/half_float.h"
 
-using namespace brw;
-
 static const bool debug = false;
 
 enum PACKED interpreted_type {

src/intel/compiler/brw_opt_copy_propagation.cpp

@@ -40,8 +40,6 @@
 #include "brw_cfg.h"
 #include "brw_eu.h"
 
-using namespace brw;
-
 namespace { /* avoid conflict with opt_copy_propagation_elements */
 struct acp_entry {
    struct rb_node by_dst;

src/intel/compiler/brw_opt_cse.cpp

@@ -33,8 +33,6 @@
  * Support for SSA-based global Common Subexpression Elimination (CSE).
  */
 
-using namespace brw;
-
 struct remap_entry {
    brw_inst *inst;
    bblock_t *block;

src/intel/compiler/brw_opt_dead_code_eliminate.cpp

@@ -34,8 +34,6 @@
  * yet in the tail end of this block.
  */
 
-using namespace brw;
-
 /**
  * Is it safe to eliminate the instruction?
  */

src/intel/compiler/brw_opt_register_coalesce.cpp

@@ -44,8 +44,6 @@
 #include "brw_fs.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 static bool
 is_nop_mov(const brw_inst *inst)
 {

src/intel/compiler/brw_opt_saturate_propagation.cpp

@@ -25,8 +25,6 @@
 #include "brw_fs.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 /** @file
  *
  * Implements a pass that propagates the SAT modifier from a MOV.SAT into the

src/intel/compiler/brw_opt_txf_combiner.cpp

@@ -7,8 +7,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 static unsigned
 dest_comps_for_txf(const fs_visitor &s, const brw_inst *txf)
 {

src/intel/compiler/brw_opt_virtual_grfs.cpp

@@ -6,8 +6,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 /**
  * Split large virtual GRFs into separate components if we can.
  *

src/intel/compiler/brw_print.cpp

@@ -10,8 +10,6 @@
 #include "dev/intel_debug.h"
 #include "util/half_float.h"
 
-using namespace brw;
-
 void
 brw_print_instructions(const fs_visitor &s, FILE *file)
 {

src/intel/compiler/brw_reg_allocate.cpp

@@ -32,8 +32,6 @@
 #include "util/set.h"
 #include "util/register_allocate.h"
 
-using namespace brw;
-
 static void
 assign_reg(const struct intel_device_info *devinfo,
            unsigned *reg_hw_locations, brw_reg *reg)

src/intel/compiler/brw_schedule_instructions.cpp

@@ -31,8 +31,6 @@
 #include "brw_cfg.h"
 #include <new>
 
-using namespace brw;
-
 /** @file
  *
  * List scheduling of FS instructions.

src/intel/compiler/brw_workaround.cpp

@@ -6,8 +6,6 @@
 #include "brw_fs.h"
 #include "brw_builder.h"
 
-using namespace brw;
-
 /* Wa_14015360517
  *
  * The first instruction of any kernel should have non-zero emask.

src/intel/compiler/test_lower_scoreboard.cpp

@@ -26,8 +26,6 @@
 #include "brw_builder.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 class scoreboard_test : public ::testing::Test {
 protected:
    scoreboard_test();

src/intel/compiler/test_opt_cmod_propagation.cpp

@@ -26,8 +26,6 @@
 #include "brw_builder.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 class cmod_propagation_test : public ::testing::Test {
 protected:
    cmod_propagation_test();

src/intel/compiler/test_opt_combine_constants.cpp

@@ -8,8 +8,6 @@
 #include "brw_builder.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 struct FSCombineConstantsTest : public ::testing::Test {
    FSCombineConstantsTest() {
       mem_ctx = ralloc_context(NULL);

src/intel/compiler/test_opt_copy_propagation.cpp

@@ -26,8 +26,6 @@
 #include "brw_builder.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 class copy_propagation_test : public ::testing::Test {
 protected:
    copy_propagation_test();

src/intel/compiler/test_opt_cse.cpp

@@ -8,8 +8,6 @@
 #include "brw_builder.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 class cse_test : public ::testing::Test {
 protected:
    cse_test();

src/intel/compiler/test_opt_saturate_propagation.cpp

@@ -26,8 +26,6 @@
 #include "brw_builder.h"
 #include "brw_cfg.h"
 
-using namespace brw;
-
 class saturate_propagation_test : public ::testing::Test {
 protected:
    saturate_propagation_test();