Kenneth Graunke accef5e8f5 brw: Replace fs_inst::target field with logical FB read/write sources ...

We can just specify this as a source to the logical FB read/write
opcodes.  Notably FB reads had no sources before; now they have one.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>

2025-02-08 01:07:22 +00:00

..

blorp

blorp: Enable SimpleFloatBlendEnable on Xe3+

2025-02-05 22:27:54 -08:00

ci

intel/ci: Update expectations for Xe

2025-02-05 14:01:03 +00:00

common

intel/common: fix mi_builder_test issue

2025-02-04 12:57:19 +00:00

compiler

brw: Replace fs_inst::target field with logical FB read/write sources

2025-02-08 01:07:22 +00:00

decoder

intel: Add meson option -Dintel-elk

2025-01-30 00:45:59 +00:00

dev

intel/dev: Provide a toggle to avoid warnings about unsupported devices

2025-02-05 14:01:03 +00:00

ds

anv: add source hashes for BVH building shaders

2025-02-07 07:27:54 +00:00

executor

intel: Initialize upper 32bits of drm_xe_sync.handle

2025-02-02 21:34:45 -08:00

genxml

intel/genxml: Update BLEND_STATE_ENTRY structure

2025-02-05 22:27:54 -08:00

isl

isl: use workaround framework for Wa_1207137018

2025-01-29 12:10:13 +00:00

nullhw-layer

build: pass licensing information in SPDX form

2024-06-29 12:42:49 -07:00

perf

intel/perf: add new perf consts to support more metrics

2025-01-16 00:01:56 +00:00

shaders

intel: output a depfile with mesa_clc

2025-02-04 00:10:01 +00:00

tools

intel: Add meson option -Dintel-elk

2025-01-30 00:45:59 +00:00

vulkan

anv: add source hashes for BVH building shaders

2025-02-07 07:27:54 +00:00

vulkan_hasvk

hasvk: disable logic op for float/srgb formats

2025-01-29 08:02:21 +00:00

meson.build

intel: Add meson option -Dintel-elk

2025-01-30 00:45:59 +00:00