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Author SHA1 Message Date
Marek Olšák
6073a149b9 gallium/docs: make CAP doc order match definition order 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26262>
 2023-11-28 17:34:26 +00:00
Christian Gmeiner
0d6803feb0 docs: Update etnaviv extensions 
Next round of feature updates.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26189>
 2023-11-28 16:55:51 +00:00
Raphaël Gallais-Pou
5c92ef9116 gallium: add sti DRM entry point 
stih418-b2264 implements an ARM Mali 400 GPU[1]. Add an entry point for sti
DRM vendor, so mesa can be used with it.

[1]: https://lore.kernel.org/lkml/20230727215141.53910-14-avolmat@me.com

Signed-off-by: Raphaël Gallais-Pou <rgallaispou@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26189>
 2023-11-28 16:55:51 +00:00
Lionel Landwerlin
b18006397b anv: remove heuristic preferring dedicated allocations 
This heuristic doesn't show much difference when you have a beafy
processor but on lower end skus, it increase the number of buffers in
the execbuffer ioctl, adding significant overhead in i915.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4cdd3178fb ("anv: Meet CCS alignment reqs with dedicated allocs")
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26335>
 2023-11-28 16:13:11 +00:00
Lionel Landwerlin
7b87e1afbc anv: track & unbind image aux-tt binding 
This solves a problem when you have a big memory chunk of which some
regions are bound to images. If the image is destroyed, currently the
aux-tt mapping stays and prevent any new image aux-tt mapping within
that region, until the memory is freed.

This maps & unmaps the aux-tt region at respectively bind & destroy
time, so that the memory chunks can be map through aux-tt.

If there is aliasing of memory to 2 different images, then the first
one "wins" the aux mapping and gets compression support. The second
one doesn´t.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ee6e2bc4a3 ("anv: Place images into the aux-map when safe to do so")
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26335>
 2023-11-28 16:13:11 +00:00
Lionel Landwerlin
b09db9d823 anv: use main image address to determine ccs compatibility 
The BO address is not really a good criteria since we can bind an
image at an offset inside a BO.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ee6e2bc4a3 ("anv: Place images into the aux-map when safe to do so")
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26335>
 2023-11-28 16:13:11 +00:00
Lionel Landwerlin
7c6faa1efe intel/aux_map: introduce ref count of L1 entries 
To implement this feature, we need to do CPU side tracking of all
L3/L2/L1 entries. This does add a little bit of CPU allocations, but
the advantage is that the traversal of the page table tree is faster.
No more need for the linear seach of find_buffer().

With this feature, we can have multiple VkImage bind to the same main
memory address, as long as they share exact same mapping parameters.
The AUX mapping will be removed when the last VkImage is destroyed.

As previously, if the L1 mapping entry parameters don't match, the
mapping fails. Anv handles this nicely by just disabling AUX on the
image.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26335>
 2023-11-28 16:13:11 +00:00
Samuel Pitoiset
02ef01fa95 radv: enable DGC preprocessing for IBO 
This seems to improve performance for Starfield by +1% and Halo Infinite
by +15%!

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10025
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26172>
 2023-11-28 14:07:37 +00:00
Samuel Pitoiset
e59a16bbb8 radv: use an indirect draw when IBO isn't updated as part of DGC 
To remove the dependency on the cmd buffer state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26172>
 2023-11-28 14:07:37 +00:00
Samuel Pitoiset
2807e27231 radv: set the stream VA for DGC graphics 
This will be used to emit indirect draws when needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26172>
 2023-11-28 14:07:37 +00:00
Samuel Pitoiset
88bbdfd23e radv: remove useless NIR instructions when emitting IBO with DGC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26172>
 2023-11-28 14:07:37 +00:00
Lionel Landwerlin
e22e88f8ce intel/fs: reuse set_predicate() 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26306>
 2023-11-28 13:40:07 +00:00
Lionel Landwerlin
83a1657b6c intel/fs: fix incorrect register flag interaction with dynamic interpolator mode 
Once NIR code is lowered and a few optimization passes have run, there
might be flag register interactions between instructions quite far
away from one another.

In the following case :

   f0 = and r0, r1
   ...
   fs_interpolate r2, r3
   ...
   if f0
      ...
   endif

If we lower fs_inteporlate while using the f0 register, we completely
garble the value meant for the if block.

To fix this, emit the predication for fs_interpolate in brw_fs_nir.cpp
when doing the NIR translation to the backend IR. This will guarantee
that the flag register interactions are visible to the optimization
passes, avoiding the problem above.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 68027bd38e ("intel/fs: implement dynamic interpolation mode for dynamic persample shaders")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9757
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26306>
 2023-11-28 13:40:07 +00:00
Georg Lehmann
4b9618ceec aco: add test for post-ra DPP clobbered in linear cfg 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26373>
 2023-11-28 12:48:56 +00:00
Georg Lehmann
576afa8540 aco: don't optimize DPP across more than one block 
Register write tracking doesn't work for inactive lanes, so this was unsafe.

Foz-DB Navi31:
Totals from 8 (0.01% of 78196) affected shaders:
Instrs: 11513 -> 11515 (+0.02%)
CodeSize: 61056 -> 61064 (+0.01%)

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10197
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26373>
 2023-11-28 12:48:56 +00:00
Samuel Pitoiset
06c9e69f44 radv/ci: add new flakes for VEGA10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26384>
 2023-11-28 09:04:08 +01:00
Jesse Natalie
f843b14c17 d3d12: Fix hevc encoder 32-bit build (uint64_t -> size_t) 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26363>
 2023-11-27 21:15:24 +00:00
Jesse Natalie
ae62fc01fa d3d12: Fix h264 encoder 32-bit build (uint64_t -> size_t) 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26363>
 2023-11-27 21:15:24 +00:00
Faith Ekstrand
500955b6cb nak: Only insert barriers around ifs if they actually re-converge 
We don't care about patterns like

    loop {
        ...
        if (...) {
            break;
        } else {
            ...
        }
        ...
    }

In that case, we don't need to sync after the if because there's nothing
to re-converge.  Every path except one will end up breaking out of it
anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26382>
 2023-11-27 20:59:34 +00:00
Faith Ekstrand
804201a3d7 nak: Run rustfmt 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26382>
 2023-11-27 20:59:34 +00:00
Faith Ekstrand
e93935dd04 nvk: Limit shader stages to supported stages 
Fixes: c7c73d6d17 ("nvk: Enable subgroups features")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26382>
 2023-11-27 20:59:34 +00:00
Iván Briano
6f9be9a2a0 hasvk: ensure we reapply always pipeline dynamic state in runtime state 
Backport of 24631d308c

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26341>
 2023-11-27 20:36:07 +00:00
Rhys Perry
2d98236dd5 ac/nir: fix partial mesh shader output writes on GFX11 
Fixes dEQP-VK.mesh_shader.ext.smoke.monolithic.mesh_shader_triangle with
nir_opt_combine_stores disabled.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 240e16fc8e ("ac/nir/ngg: Use attribute ring for mesh shader params.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25530>
 2023-11-27 20:11:03 +00:00
Mary Guillemard
f59665bb62 venus: Do not submit batch manually when no feedback is required 
This fixes hangs with Zink on piglit spec@arb_sparse_buffer tests caused by the double submission.

Fixes: a55d26b566 ("venus: add back sparse binding support")

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26375>
 2023-11-27 19:53:09 +00:00
Jesse Natalie
1924cdc289 d3d12: Fix multidimensional array ordering 
Apparently my C multimensional array syntax was rusty.

Fixes: a6740ee7 ("d3d12: Fix indexing of local_reference_state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26362>
 2023-11-27 19:36:16 +00:00
Samuel Pitoiset
da3f3a46b1 ci: uprev vkd3d-proton to 2.11 
This contains many new tests.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26376>
 2023-11-27 15:18:19 +00:00
Eric Engestrom
cf510e38a5 intel/ci: fix .hasvk-manual-rules 
Fixes: 570acf5655 ("ci: Add a manual full and 1/10th hasvk CTS runs.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26259>
 2023-11-27 12:55:18 +00:00
Eric Engestrom
1942073112 intel/perf: fix regex escaping 
`\$` is interpreted before being passed to `re.search()`, but luckily
for us the escape is also invalid and because of that, python 3.12+
warns us about it.

Use a raw string instead, so that the `\` is passed untouched to
`re.search()`.

Fixes: aa04b47c6e ("intel/perf: add support for GtSlice/GtSliceXDualsubsliceY variables")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26355>
 2023-11-27 11:58:03 +00:00
Eric Engestrom
1492d24f89 lp: make sure 0xff is unsigned before shifting it past signed int range 
src/gallium/auxiliary/gallivm/lp_bld_format_s3tc.c:2446:82: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26368>
 2023-11-27 09:51:01 +00:00
Christian Gmeiner
023fa0aa5d etnaviv: Mark etna_rs_gen_clear_surface(..) private 
There are no users outside of etnaviv_rs.c.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26096>
 2023-11-27 06:59:05 +00:00
Christian Gmeiner
9342544ca5 etnaviv: rs: Call etna_rs_gen_clear_surface(..) when needed 
Calling etna_rs_gen_clear_surface(..) during surface creation could end
in the following assert:
   etna_rs_gen_clear_surface: Assertion `!"" "bpp not supported for clear by RS"'

Lets call etna_rs_gen_clear_surface(..) only when it is needed.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26096>
 2023-11-27 06:59:05 +00:00
Pierre-Eric Pelloux-Prayer
945288ffae radeonsi: check sctx->tess_rings is valid before using it 
Fixes: c89ca3b47f ("radeonsi: change si_emit_derived_tess_state into a state atom")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10015

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26190>
 2023-11-25 15:33:03 +00:00
Marek Olšák
b6e98677c3 nir/print: print PATCH0 and VARn_16BIT names instead of numbers for TCS and TES 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26275>
 2023-11-25 09:50:19 -05:00
Marek Olšák
5c8730ebe8 nir: don't declare illegal varyings in nir_create_passthrough_tcs 
I called it accidentally with LAYER.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26275>
 2023-11-25 09:50:19 -05:00
Marek Olšák
7a9b73fcb8 nir: fix gathering TESS_LEVEL_INNER/OUTER usage with lowered IO 
Those varyings shouldn't flag patch_inputs_read/patch_outputs_written.

Fixes: 10be706778 - nir: gather indirect info from lowered IO intrinsics

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26275>
 2023-11-25 09:50:19 -05:00
Eric Engestrom
827bbe4829 ci: use released version of meson 
This was needed before 1.3.0 was released, but now we can use 1.3.0 :)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26289>
 2023-11-24 20:45:45 +00:00
Jesse Natalie
698344b93c d3d12/driconf: Force on ARB_texture_view for Blender 
Reviewed-by: Anthony Roberts <anthony.roberts@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26326>
 2023-11-24 20:03:22 +00:00
Eric Engestrom
9feecda201 docs: add another -rc 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26361>
 2023-11-24 19:51:01 +00:00
Eric Engestrom
69d1e29dc3 docs: update calendar for 23.0.0-rc5 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26361>
 2023-11-24 19:51:01 +00:00
Faith Ekstrand
28ae3210e1 nvk: Wire up MESA_VK_VERSION_OVERRIDE 
We'll probably drop this once we have Vulkan 1.3 but this makes it a bit
easier to test stuff right now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26359>
 2023-11-24 19:33:15 +00:00
Marek Olšák
b07a58157d radeonsi: remove the LAYER output if the framebuffer state has only 1 layer 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Marek Olšák
3a0a3a5c35 radeonsi: implement gl_Layer in FS as a system value 
This replaces the vec4 FS input with the Ancillary VGPR input.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Marek Olšák
130428e758 radeonsi: don't allocate output space for LAYER/VIEWPORT before TES and GS 
The outputs are ignored according GL_ARB_shader_viewport_layer_array.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Marek Olšák
0cd3d58227 radeonsi: clean up si_nir_kill_outputs 
Use a switch statement for sysval outputs and simplify code.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Marek Olšák
17c38eb9a5 st/mesa: set pipe_framebuffer_state::layers for PBO blits 
It only worked with drivers that ignored it.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Marek Olšák
e0a24c7fe0 ac/nir: add kill_layer flag to VS/GS/NGG lowering 
When the framebuffer state has only 1 layer, the output has no effect.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Marek Olšák
27a9ddad28 nir: return progress from nir_remove_sysval_output 
Changing IO semantics doesn't affect the SSA structure.

Same as nir_remove_varying.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Marek Olšák
32ee6376ad nir: add lowering from FS LAYER input to LAYER_ID sysval 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Juan A. Suarez Romero
a181c86e73 broadcom/ci: separate hiden jobs to -inc.yml files 
make it easier to re-use the hidden jobs by other project (e.g. linux)
without enabling the executable jobs.

Inspired on 9442571664 ("ci: separate hiden jobs to -inc.yml files").

Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26350>
 2023-11-24 15:09:30 +00:00
Kai Wasserbäch
bc7e363f8e fix: ac/llvm: LLVM 18: remove useless passes, partially removed upstream 
Upstream removed llvm::createLoopSinkPass() in commit
<b9975cec0e>
and there is no useful alternative except moving to the new pass
manager.

On top of that, the usage of this optimisation pass and
PromoteMemoryToRegisterPass were just useless, according to the
upstream developer of the commit named above. Therefore the easiest
solution is, as him, Marek and Dave suggested, to just remove these two
passes from the pipeline for now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10192
Reference: https://github.com/llvm/llvm-project/pull/72811
Reference: b9975cec0e
Suggested-by: Dave Airlie <airlied@redhat.com>
Suggested-by: Aiden Grossman <agrossman154@yahoo.com>
Suggested-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26336>
 2023-11-24 14:11:09 +00:00