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Author SHA1 Message Date
Pavel Ondračka
8f4b9ed4d8 CODEOWNERS: add r300 driver 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23468>
 2023-06-09 19:31:20 +00:00
Christian Gmeiner
62e0f6bf32 etnaviv: Add support for conditional rendering 
The hardware doesn't support native conditional rendering, so it is
implemented by software.

Code borrowed from Freedreno and Panfrost.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23392>
 2023-06-09 20:35:24 +02:00
Lucas Stach
a603413eb8 etnaviv: optimize transfer flushes 
Context flushes that are triggered by a pending write to the resource
don't need to realize visibility of the resource changes outside of
the context. Skip implicit resource flushes in those cases.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23549>
 2023-06-09 16:42:24 +00:00
Friedrich Vock
64fda091de aco: Lower divergent bool phis iteratively 
Avoids stack overflows with really large programs.

No fossil-db changes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8760
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8701

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23531>
 2023-06-09 12:39:55 +00:00
Alyssa Rosenzweig
ba27071c8b agx: Fold addressing math into atomics 
Like our loads and stores, our global atomics support indexing with a 64-bit
base plus a 32-bit element index, zero- or sign-extended and multiplied by the
word size. Unlike the loads and stores, they do not support additional shifting
(it's not too useful), so that needs an explicit lowering.

Switch to using AGX variants of the atomics, running our address pattern
matching on global atomics in order to delete some ALU.

This cleans up the image atomic lowering nicely, since we get to take full
advantage of the shift + zero-extend + add on the atomic... The shift comes from
multiplying by the bytes per pixel.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
13535d3f9d agx: Refactor expressions in agx_nir_lower_address 
So we can add more instructions without duplication.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
5a55ef2fd1 nir: Add AGX atomic intrinsics 
This is a piece of cake with unified atomics :-) This will let us do our
addressing math tricks nice and easily.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
06f4608c5b ir2: Drop lower_locals_to_regs call 
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
10fb9de9f6 lima: Drop lower_locals_to_regs call 
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
03175f61fc pan/mdg: Drop lower_locals_to_regs call 
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Martin Roukala (né Peres)
4f317d15d3 amd/ci: add another test to the vkcts-vega10 flake list 
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23547>
 2023-06-09 11:38:43 +00:00
Martin Roukala (né Peres)
b8c7665599 zink/ci: add more QBO-related fails on RADV 
These seem to have been forgotten during the original filing, probably
because more than 25 failures were found, and so deqp-runner limited
itself to 25.

References: #9174
Fixes: dad91dc7c4 ("zink: update some radv qbo fails")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23547>
 2023-06-09 11:38:43 +00:00
Rhys Perry
56eb831155 aco: run nir_lower_int64 after nir_opt_uniform_atomics 
nir_opt_uniform_atomics can create 64-bit ALU instructions which need to
be lowered.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23502>
 2023-06-09 11:18:33 +00:00
Karol Herbst
948970c1eb rusticl/icd: use new proc macros 
This drops quite a lot of boilerplate code as this is now all generated
via our proc macros.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed by Nora Allen <blackcatgames@protonmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
 2023-06-09 10:35:24 +00:00
Karol Herbst
e3bdc7cc23 rusticl/icd: make release return nothing 
I don't even know why it was like that...

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
 2023-06-09 10:35:23 +00:00
Karol Herbst
5875f2e803 rusticl: add proc macro module for generating API stubs 
Most of the API stubs are very very trivial to generate as the sole
purpose of those are to deconstruct the returned `Result` object.

Sadly we can't use external crates yet, so "syn" and "qoute" can't be used
for this :'(

The code is kinda hacky, but we also don't expose this to other people, so
we can keep this as a big hack until we can use external crates.

I wish there was a better solution here.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
 2023-06-09 10:35:23 +00:00
Lucas Stach
b1cd5780d6 etnaviv: rs: unconditionally flush color and depth cache before using RS 
When the RS uses the pixel pipes it seems to destroy/invalidate any
content sitting in the color and depth caches from a previous draw.
Always flush the color and depth cache before using the RS to make
sure that any cache content written by the PE is properly flushed
to memory.

Fixes spec@!opengl 1.0@gl-1.0-drawpixels-depth-test and probably a
few others that are suffering from corruption of PE writes.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23530>
 2023-06-09 10:17:42 +00:00
Lucas Stach
cfc1be9590 etnaviv: rs: flush TS cache before making configuration changes 
Move the TS cache flush into the same conditional block where
the TS setup is changed. TS cache always needs to be flushed
before making any changes to the TS setup.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23530>
 2023-06-09 10:17:42 +00:00
Hyunjun Ko
c39521a929 anv/video: move video requirements to outarray. 
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23519>
 2023-06-09 10:07:18 +02:00
Martin Roukala (né Peres)
689b01c598 ci/b2c: update to mesa-trigger:2023-03-08.1 
This should speed up job submission by 3 to 30 seconds depending on
the farm the machine is hosted in, and how busy it is.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23361>
 2023-06-09 07:32:23 +00:00
Gert Wollny
7c78c346ff rusticl: compile r600 driver 
To really use the driver it still needs to be enabled with

  export RUSTICL_ENABLE=r600

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
 2023-06-09 08:49:49 +02:00
Gert Wollny
33d878eb58 r600/sfn: Handle load_global in 64 to vec2 lowering 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
 2023-06-09 08:49:49 +02:00
Gert Wollny
687e41da61 r600/sfn: Handle store_global when lowering 64 bit ops to vec2 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
 2023-06-09 08:49:49 +02:00
Gert Wollny
9dbe936fe4 r600/sfn: Add experimental support for load/store_global 
This is needed for rusticl, but the results may be unexpected.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
 2023-06-09 08:49:49 +02:00
Lionel Landwerlin
25de091753 intel/nir: switch ray query state tracking to local variables uint16_t 
We should be able to use uint8_t but there appears to be a backend
bug.

Q2RTX shader compute shader improvement with ray queries :

Totals:
Instrs: 102221 -> 101499 (-0.71%); split: -0.82%, +0.12%
Cycles: 4451260 -> 4396025 (-1.24%)
Send messages: 3587 -> 3585 (-0.06%)
Spill count: 717 -> 658 (-8.23%)
Fill count: 1248 -> 1214 (-2.72%); split: -3.21%, +0.48%
Scratch Memory Size: 21504 -> 16384 (-23.81%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19982>
 2023-06-09 08:29:43 +03:00
Dave Airlie
085f6ec6eb radv/video: fix hevc scaling list order. 
pps takes priority.

Fixes: da54b57888 ("radv/video: fix hevc scaling lists.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23537>
 2023-06-09 03:22:43 +00:00
Dave Airlie
4cc86e4ea9 radv/video: report bad profile operation if h264 profile isn't supported. 
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23537>
 2023-06-09 03:22:43 +00:00
Qiang Yu
5024d8c763 radeonsi: enable aco support for gs copy shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:49 +08:00
Qiang Yu
8b71935c14 radeonsi: enable aco for standalone gs 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:45 +08:00
Qiang Yu
1e2d4b32b0 ac/llvm,radeonsi: lower nir_load_ring_gsvs_amd in abi 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:41 +08:00
Qiang Yu
4e3da403cc radeonsi: add scratch_offset arg for aco gs 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:37 +08:00
Qiang Yu
afa90c6a41 radeonsi: enable aco support for standalone tes 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:33 +08:00
Qiang Yu
f8c830ab85 radeonsi: update lds size for tes 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:28 +08:00
Qiang Yu
62c8edaa63 radeonsi: init tes aco shader info fields 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:24 +08:00
Qiang Yu
e8b3c9a13b radeonsi: add scratch_offset arg for aco tes 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:18 +08:00
Qiang Yu
13ff818d56 radeonsi: enable aco support for mono standalone tcs 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:13 +08:00
Qiang Yu
b4f3b7c340 ac/llvm,radeonsi: lower nir_load_ring_tess_offchip_amd in abi 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:08 +08:00
Qiang Yu
415ed0567a radeonsi: lower nir_load_tess_rel_patch_id_amd in abi for aco 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:02 +08:00
Qiang Yu
497d563b5e radeonsi: add scratch_offset arg for aco tcs 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:52:34 +08:00
Qiang Yu
b44bbe7daa ac/nir,radv: add 1 dword to ES/GS item size 
This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>
 2023-06-09 02:05:20 +00:00
Qiang Yu
2e1092095a ac/nir,radv: add 1 dword to LS/HS vertex stride 
This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>
 2023-06-09 02:05:20 +00:00
Christian Gmeiner
c2251b8e13 ci/etnaviv: add asan run 
Has more a PoC state that it works and needs some time get stable.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23493>
 2023-06-08 22:30:30 +00:00
Christian Gmeiner
6d510fcdc5 ci: add debian-arm32-asan 
I want to have the possibility to use asan in for etnaviv ci. As lot
devices in the my CI farm are arm32 based lets do some prep work.

I had to skip the mesa:util suite as there are some asan problems
on 32bit platform with the hash_map. Once they got sorted out we can
enable the suite again.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23493>
 2023-06-08 22:30:30 +00:00
Caio Oliveira
2bb26cc01d intel/compiler: Refactor dump_instruction(s) 
Delete unnecessary virtual functions, we need just two.  Refactor code
so the 'default behavior' logic (stderr and/or creating file) is not
duplicated.

Rename the virtuals so overrides don't hide the common convenience
functions.  Finally, provide a variant of dump_instructions() with
a `FILE *` parameter.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23457>
 2023-06-08 22:00:21 +00:00
Caio Oliveira
4f9a23e339 spirv: Use vtn_translate_scope for OpReadClockKHR 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23508>
 2023-06-08 21:21:47 +00:00
Caio Oliveira
089a0cf4ef spirv: Refactor and rename scope translation helper 
This will make the change from nir_scope to mesa_scope
later less noisy.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23508>
 2023-06-08 21:21:47 +00:00
Juston Li
7ff978b5de docs: venus: update extension support 
Advertise support for the follow extensions:
- VK_EXT_non_seamless_cube_map
- VK_EXT_dynamic_rendering_unused_attachments
- VK_KHR_shader_clock
- VK_EXT_border_color_swizzle
- VK_EXT_fragment_shader_interlock
- VK_EXT_shader_subgroup_ballot
- VK_EXT_color_write_enable

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
 2023-06-08 21:08:13 +00:00
Juston Li
106e97a43a venus: enable VK_EXT_color_write_enable 
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
 2023-06-08 21:08:13 +00:00
Juston Li
ca0b781132 venus: enable VK_EXT_shader_subgroup_ballot 
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
 2023-06-08 21:08:13 +00:00
Juston Li
5f2d38ac3c venus: enable VK_EXT_fragment_shader_interlock 
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
 2023-06-08 21:08:13 +00:00