7c995df9aa
aco: fix follow_operand with combined label_extract and label_split
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
9ee24db882
aco: add missing isConstant()/isTemp() checks
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
5e1d3f571d
aco: turn split(vec()) into p_parallelcopy instead of p_create_vector
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
f842bd81ca
aco: use s_pack_*_b32_b16 more in p_insert/p_extract lowering
...
This opcode doesn't write SCC, which gives later passes more freedom to
move instructions.
fossil-db (navi21):
Totals from 727 (0.92% of 79395) affected shaders:
Latency: 14943483 -> 14942704 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 3225790 -> 3225766 (-0.00%); split: -0.00%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:22 +00:00
ca161a96d1
aco: combine extracts into s_pack_ll_b32_b16
...
fossil-db (navi21):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 45941 -> 45924 (-0.04%)
CodeSize: 241768 -> 241756 (-0.00%)
Latency: 176501 -> 176491 (-0.01%)
Copies: 6884 -> 6882 (-0.03%)
SALU: 6101 -> 6088 (-0.21%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:21 +00:00
98cb50297b
aco: use s_pack_ll_b32_b16 for pack_32_2x16_split
...
fossil-db (navi21):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 45963 -> 45941 (-0.05%)
CodeSize: 241908 -> 241768 (-0.06%)
Latency: 176508 -> 176501 (-0.00%)
SALU: 6123 -> 6101 (-0.36%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912 >
2024-07-01 17:34:21 +00:00
6326cc4a5e
radv: use radv_get_user_sgpr() more in DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
598e85b3e9
radv: use the graphics pipeline from the DGC info
...
Doesn't change anything because it's required to bind one graphics
pipeline before using DGC but it's cleaner.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
4c8d44aed0
radv: move radv_CmdPreprocessGeneratedCommandsNV() to radv_cmd_buffer.c
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
e7f6388ac7
radv: use radv_dgc_with_task_shader() more
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
b51b8c54c0
radv: cleanup using vtx_base_sgpr for userdata with DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
c77e26daa5
radv: do not emit compute userdata for empty dispatches
...
Unnecessary.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
3f919c0df6
radv: remove unused parameter to dgc_emit_draw_mesh_tasks_ace()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980 >
2024-07-01 16:54:09 +00:00
484f613a97
radv: use radv_get_user_sgpr_loc() for the GS copy shader too
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29957 >
2024-07-01 13:39:51 +00:00
f22ee282fc
radv: add radv_get_user_sgpr{_loc}() helpers
...
To simplify all the user sgpr computations which are very redundant.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29957 >
2024-07-01 13:39:51 +00:00
bf852536fc
radv: rename radv_get_user_sgpr() to radv_get_user_sgpr_info()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29957 >
2024-07-01 13:39:51 +00:00
48a7c212ba
radeonsi/ci: mark test as fixed
...
This was fixed by one of the commits in the range 5cb15a6c...6006588a.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29981 >
2024-07-01 10:01:38 +00:00
68215332a8
build: pass licensing information in SPDX form
...
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Dylan Baker <dylan.c.baker@intel.com >
Acked-by: Eric Engestrom <eric@igalia.com >
Acked-by: Daniel Stone <daniels@collabora.com >
Signed-off-by: David Heidelberg <david@ixit.cz >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29972 >
2024-06-29 12:42:49 -07:00
cc48e12431
radv: suspend user conditional rendering when DGC has task shaders
...
Otherwise the DGC ACE IB would be uninitialized and it would hang.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29954 >
2024-06-28 14:35:22 +00:00
9ae1c5dce3
radv: Refactor radv_(dst|src)_access_flush
...
A few ifs should be faster and more readable than looping over every set
bit.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
41619da397
radv: Handle AS access bits like shader storage access bits
...
Acceleration structures are accessed directly from shaders or via
PKT3_WRITE_DATA.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
ca96abe1cb
radv: Remove write access handling from radv_dst_access_flush
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
3eefd0b040
radv: Remove handling for expanded access flags
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
135348a3c3
radv: Remove no-op access flag handling
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
3acab3dfff
radv: Use vk_expand_(src|dst)_access_flags2
...
Simplifies access flags handling since the driver doesn't have to worry
about VK_ACCESS_2_MEMORY_READ_BIT and friends.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29051 >
2024-06-28 10:41:49 +00:00
88864b707a
radv: enable task shaders support with NV DGC
...
No games are using task shaders with DGC at the moment but this is
supposed to work.
This fixes test_amplification_shader_execute_indirect from vkd3d.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
e6aee84265
radv: fix a synchronization issue with non-preprocessed DGC with task shader
...
We need to make sure that the DGC ACE IB will wait for the DGC
prepare shader before the execution starts. When DGC is preprocessed
the synchronization is already correct.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
74713469e1
radv: disable conditional rendering with DGC and task shaders
...
When the DGC prepare shader is conditionally executed on the graphics
queue, the generated IBs might be uninitialized. It's fine for the
DGC GFX IB because the INDIRECT_PACKET would also be conditionally
skipped but it's not possible to do that for the DGC ACE IB
(ie. no IB2 on compute).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
fec2385301
radv: emit push constant for task shaders with DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
1ffb420edd
radv: adjust the base upload offset when DGC uses task shaders
...
The upload space is after the DGC ACE IB.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
f55d4f2f09
radv: reserve space for push constants in the DGC ACE IB
...
The upload space will be shared for both IBs when push constants need
to be allocated.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
8d321421c7
radv: rework emitting push constants with DGC
...
Using a push constant stages mask to emit them in the DGC ACE IB for
task shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
f6150edbb3
radv: split allocating and emitting push constants with DGC
...
This will allow us to emit push constants for task shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
1f7bdcfa8d
radv: add a helper that determines if DGC uses task shaders
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
58327fd3bf
radv: pre-compute the base upload offset in radv_prepare_dgc()
...
It will need to be adjusted if task+mesh shaders need to allocate
push constants.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
842f3ea133
radv: improve clarity of DGC offset computations
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29935 >
2024-06-28 06:19:56 +00:00
bc52e77397
radv: fix incorrect cache flushes before decompressing DCC on compute
...
Found by luck.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29940 >
2024-06-28 05:54:20 +00:00
037eaa962b
radv: add support for executing the DGC ACE IB
...
It's disabled for now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:50 +00:00
1e0c6fab21
radv: add support for preparing the ACE IB in DGC
...
This is still missing push constants.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:50 +00:00
723acbe1e2
radv: add a helper to pad DGC IB
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:50 +00:00
0a5c6415d1
radv: refactor some DGC helpers in preparation for the ACE IB
...
These will be re-used for generating the ACE IB.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
12cc97a157
radv: prepare for DISPATCH_TASKMESH_DIRECT_ACE emission in the DGC shader
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
8a81a6066d
radv: prepare for DISPATCH_TASKMESH_GFX emission in the DGC shader
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
bdbe3e5886
radv: add support for computing the DGC ACE IB size
...
For task shaders, RADV will need to prepare two command buffers in the
DGC prepare shader. The preprocess buffer will be splitted in two
parts, one for GFX and one for ACE.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
99cd8b6a54
radv: add a helper to execute a DGC IB
...
It will be used to execute DGC IB for task shaders too.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814 >
2024-06-27 10:22:49 +00:00
7fc8ad2ddd
aco/ir: remove unused vopc helpers
...
And rename get_swapped and get_inverse to show that they should only be used for VOPC.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
2225a32bb0
aco: remove ordered/unordered optimizations
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
080e03d021
ac/nir: enable ford, funord, fneo, fequ, fltu, fgeu
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
3dfc8b3bcf
ac/llvm: implement ford, funord, fneo, fequ, fltu, fgeu
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
c5ba17cd25
aco: implement ford, funord, fneo, fequ, fltu, fgeu
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467 >
2024-06-27 08:12:30 +00:00
Rhys Perry