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radv: use radv_dgc_with_task_shader() more

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980>
This commit is contained in:
Samuel Pitoiset
2024-06-28 09:54:33 +02:00
committed by Marge Bot
parent b51b8c54c0
commit e7f6388ac7
1 changed files with 3 additions and 7 deletions
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src/amd/vulkan/radv_cmd_buffer.c
+3 -7
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@@ -11490,16 +11490,12 @@ radv_CmdExecuteGeneratedCommandsNV(VkCommandBuffer commandBuffer, VkBool32 isPre
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_INV_VCACHE | RADV_CMD_FLAG_INV_L2;
if (!compute) {
struct radv_graphics_pipeline *graphics_pipeline = radv_pipeline_to_graphics(pipeline);
if (radv_dgc_with_task_shader(pGeneratedCommandsInfo)) {
/* Make sure the DGC ACE IB will wait for the DGC prepare shader before the execution
* starts.
*/
if (radv_pipeline_has_stage(graphics_pipeline, MESA_SHADER_TASK)) {
radv_gang_barrier(cmd_buffer, VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV,
VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT);
}
radv_gang_barrier(cmd_buffer, VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV,
VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT);
}
}