Samuel Pitoiset 0a5c6415d1 radv: refactor some DGC helpers in preparation for the ACE IB ...

These will be re-used for generating the ACE IB.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>

2024-06-27 10:22:49 +00:00

..

addrlib

amd: update addrlib

2024-06-08 00:11:17 -04:00

ci

Uprev Piglit to fdf3fc09deb6beecdf212e65a16c645112540b59

2024-06-24 07:10:48 +00:00

common

ac/nir: enable ford, funord, fneo, fequ, fltu, fgeu

2024-06-27 08:12:30 +00:00

compiler

aco/ir: remove unused vopc helpers

2024-06-27 08:12:30 +00:00

drm-shim

amd: Use align64 instead of ALIGN for 64 bit value parameter

2024-01-03 22:02:17 +00:00

llvm

ac/llvm: implement ford, funord, fneo, fequ, fltu, fgeu

2024-06-27 08:12:30 +00:00

registers

amd: add gfx12 register definitions

2024-05-11 22:14:05 -04:00

vpelib

amd/vpelib: Bypass de/regam on HLG

2024-05-07 20:43:02 +00:00

vulkan

radv: refactor some DGC helpers in preparation for the ACE IB

2024-06-27 10:22:49 +00:00

meson.build

build/amd: add amd-use-llvm build option

2024-05-30 19:05:00 +00:00