Commit Graph

4248 Commits

Author SHA1 Message Date
Kai Wasserbäch acfea09dbd nir: fix unused function warning in src/compiler/nir/nir.c
This commit fixes the following warning:
../src/compiler/nir/nir.c:1827:1: warning: ‘dest_is_ssa’ defined but not used [-Wunused-function]
 1827 | dest_is_ssa(nir_dest *dest, void *_state)
      | ^~~~~~~~~~~

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-11-07 11:32:55 +11:00
Kai Wasserbäch 4f8cc032b7 nir: fix unused variable warning in find_and_update_previous_uniform_storage
This commit fixes the following warning:
../src/compiler/glsl/gl_nir_link_uniforms.c: In function ‘find_and_update_previous_uniform_storage’:
../src/compiler/glsl/gl_nir_link_uniforms.c:166:16: warning: unused variable ‘num_blks’ [-Wunused-variable]
  166 |       unsigned num_blks = nir_variable_is_in_ubo(var) ?
      |                ^~~~~~~~

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-11-07 11:32:55 +11:00
Kai Wasserbäch 8aa4d0bff6 nir: fix unused variable warning in nir_lower_vars_to_explicit_types
This commit fixes the following warning:
../src/compiler/nir/nir_lower_io.c: In function ‘nir_lower_vars_to_explicit_types’:
../src/compiler/nir/nir_lower_io.c:1435:22: warning: unused variable ‘supported’ [-Wunused-variable]
 1435 |    nir_variable_mode supported = nir_var_mem_shared | nir_var_shader_temp | nir_var_function_temp;
      |                      ^~~~~~~~~

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-11-07 11:32:55 +11:00
Samuel Pitoiset c0f76528ae nir: fix packing of nir_variable
The maximum number of descriptor sets is indeed 32 but without
the sign bit.

The maximum number of bindings for RADV is way larger, keep it
as 32-bit.

Fixes: 96e6ef80d9 ("nir: pack the rest of nir_variable::data")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2019-11-06 08:51:53 +01:00
Marek Olšák 8145492f4a nir/serialize: pack nir_variable flags
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-05 23:35:31 -05:00
Marek Olšák 3aa72a394a nir/serialize: store 32-bit object IDs instead of 64-bit
That means we have only 30 bits for object IDs, because 2 bits are
sometimes used for something else.

This decrease the uncompressed shader size for the biggest Borderlands 2
shader from 33.6 KB to 23.2 KB. (31% decrease)

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-05 23:35:31 -05:00
Marek Olšák d5768fcd45 nir/serialize: don't expand 16-bit variable state slots to 32 bits
the swizzle also needs only 16 bits

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-05 23:35:31 -05:00
Marek Olšák 96e6ef80d9 nir: pack the rest of nir_variable::data
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-05 23:32:34 -05:00
Kenneth Graunke 337f58438e nir: Handle image arrays when setting variable data
Fixes a ton of regressions in image load store tests.

Fixes: 4319cc8c0f ("nir: pack nir_variable::data::xfb_*")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 18:16:06 -08:00
Marek Olšák 4319cc8c0f nir: pack nir_variable::data::xfb_*
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 18:17:34 -05:00
Marek Olšák 08dc541b66 nir: pack nir_variable::data::stream
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 18:17:34 -05:00
Ian Romanick 9be4a422a0 nir/algebraic: Mark other comparison exact when removing a == a
This prevents some additional optimizations that would change the
original result.  This includes things like (b < a && b < c) => b <
min(a, c) and !(a < b) => b >= a.  Both of these optimizations were
specifically observed in the piglit tests added in piglit!160.

This was discovered while investigating
https://gitlab.freedesktop.org/mesa/mesa/issues/1958.  However, the
problem in that issue was Chrome or Angle is replacing calls to isnan()
with some stuff that we (correctly) optimize to false.  If they had left
the calls to isnan() alone, everything would have just worked.

No shader-db changes on any Intel platform.

I also tried marking the comparison generated by the isnan() function
precise.  The precise marker "infects" every computation involved in
calculating the parameter to the isnan() function, and this severely
hurt all of the (few) shaders in shader-db that use isnan().

I also considered adding a new ir_unop_isnan opcode that would implement
the functionality.  During GLSL IR-to-NIR translation, the resulting
comparison operation would be marked exact (and the samething would need
to happen in SPIR-V translation).

This approach taken by this patch seemed easier, but we may want to do
the ir_unop_isnan thing anyway.

Fixes: d55835b8bd ("nir/algebraic: Add optimizations for "a == a && a CMP b"")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 14:05:49 -08:00
Ian Romanick ea19f2fb68 nir/algebraic: Add the ability to mark a replacement as exact
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 14:05:49 -08:00
Marek Olšák af94600484 compiler: make variable::data::binding unsigned
Nothing seems to set a negative value.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 16:49:46 -05:00
Marek Olšák 4b4b383f38 st/mesa: call nir_lower_flrp only once per shader
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 16:49:44 -05:00
Dylan Baker 717606f9f3 nir: correct use of identity check in python
Python has the identity operator `is`, and the equality operator `==`.
Using `is` with strings sometimes works in CPython due to optimizations
(they have some kind of cache), but it may not always work.

Fixes: 96c4b135e3
       ("nir/algebraic: Don't put quotes around floating point literals")
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-11-04 16:06:39 +00:00
Marek Olšák c236e6c1e3 glsl: encode struct/interface types better
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-11-01 19:19:03 -04:00
Marek Olšák 5dde2aa8d9 glsl: encode array types better
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-11-01 19:19:03 -04:00
Marek Olšák c141366560 glsl: encode explicit_stride for basic types better
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-11-01 19:19:03 -04:00
Marek Olšák 86adce4fef glsl: encode vector_elements and matrix_columns better
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-11-01 19:19:03 -04:00
Marek Olšák 21d2fbb8c3 glsl: encode/decode types using a union with bitfields for readability
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-11-01 19:19:03 -04:00
Timothy Arceri 1c2bf82d24 glsl: disable lower_fragdata_array() for NIR drivers
This function was added in 7e414b5864 to work around a defect in
lower_output_reads(). As of the previous commit no NIR driver calls
lower_output_reads().

This change means we don't need the special GLSL IR style
gl_FragData handling for building the resource list in a NIR based
linker.

No shader-db change on SKL i965.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-01 11:33:54 +11:00
Yevhenii Kolesnikov 265e4d9432 glsl: Enable textureSize for samplerExternalOES
From OES_EGL_image_external_essl3

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1901

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-31 20:23:56 +00:00
Robert Foss 6f3f855320 nir: Build nir_lower_point_size.c in libmesa_nir
nir_lower_point_size.c was not build into the libmesa_nir library for non-meson
builds. However it was included in the meson build.

This patch fixes that.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-10-31 10:03:54 +01:00
Tapani Pälli b380d47998 nir: fix couple of compile warnings
Fixes "warning: braces around scalar initializer" warnings.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-10-31 00:21:44 +00:00
Caio Marcelo de Oliveira Filho 9c3c206e71 spirv: Don't fail if multiple ordering semantics bits are set
Vulkan requires that only one bit for the ordering is set, but old
versions of GLSLang just set all the bits.  This was fixed as part of
https://github.com/KhronosGroup/glslang/commit/c51287d744fb6e7e9ccc09f6f8451e6c64b1dad6
but we can still find older versions (or shaders compiled with it)
around.

So instead of failing, emit a warning and fallback to the effective
result of any combination of multiple bits: AcquireRelease.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2018
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-10-29 14:53:46 -07:00
Danylo Piliaiev 8818e0df74 glsl: Initialize all fields of ir_variable in constructor
Better be safe, even if we could technically avoid this for
some fields.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1999
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-28 12:49:15 +00:00
Timothy Arceri 7f106a2b5d util: rename list_empty() to list_is_empty()
This makes it clear that it's a boolean test and not an action
(eg. "empty the list").

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-10-28 11:24:38 +00:00
Dylan Baker 09ee11f5da nir: Fix invalid code for MSVC
Fixes: ee2050b111
       ("nir: Use BITSET for tracking varyings in lower_io_arrays")
2019-10-25 22:47:32 +00:00
Marek Olšák 88e9042b6c glsl/serialize: optimize for equal offsets in uniform remap tables
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1416

This decreases the shader cache size in the ticket from 1.6 MB to 40 KB.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-10-25 17:01:26 -04:00
Marek Olšák e90269d90a glsl/serialize: restructure remap table code
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-10-25 17:01:25 -04:00
Kenneth Graunke f306d07932 nir: Use VARYING_SLOT_TESS_MAX to size indirect bitmasks
MAX_VARYINGS_INCL_PATCH subtracts VARYING_SLOT_VAR0 giving us a size
that's too small, so BITSET_SET writes words out of bounds, corrupting
the stack and causing all kinds of chaos.  VARYING_SLOT_TESS_MAX is
the right value to use here, as it's the largest location.

Closes: 2002
Fixes: ee2050b111 ("nir: Use BITSET for tracking varyings in lower_io_arrays")
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-25 13:29:09 -07:00
Kristian H. Kristensen ee2050b111 nir: Use BITSET for tracking varyings in lower_io_arrays
MAX_VARYINGS_INCL_PATCH is greater than 64, so we'll need more that 64
bits (per component) to track which vars have indirects. This pass was
trying to track patch varyings (which start at bit 63) in a separate
64 bit word, but failed to subtract VARYING_SLOT_PATCH0 and accessed
out of bounds.

Do away with the ad-hoc bit mask tracking and just use a BITSET.

Fixes: dEQP-GLES31.functional.tessellation.user_defined_io.per_patch_block.vertex_io_array_size_implicit.triangles
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-24 15:32:20 -07:00
Caio Marcelo de Oliveira Filho d31f415ba0 spirv: Add helper to find args of Image Operands
Avoid keeping track of the idx and all possible image operands for
each operation.  Note for convenience we split up the handling of
ImageOperandsOffsetMask and ImageOperandsConstOffsetMask.

Suggested by Jason Ekstrand.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho c7d8fe2f0d spirv: Check that only one offset is defined as Image Operand
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho d27b853c08 spirv: Add imageoperands_to_string helper
Change the information to also include the category, so that the
particulars of BitEnum enumeration can be handled in the template.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho b8784fe652 spirv: Handle MakePointerAvailable/Visible
Emit barriers with semantics matching the access operand and the
storage class of the pointer.

v2: Fix order of visible / available emission relative to the
    operations.  (Bas)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho 129c85c28b spirv: Handle MakeTexelAvailable/Visible
Set the memory semantics and scope for later emitting the barrier.
Note the barrier emission code already exist in vtn_handle_image for
the Image atomics.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho c649e64edc spirv: Add option to emit scoped memory barriers
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho c022043102 spirv: Add SpvMemoryModelVulkan and related capabilities
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho 1bb191a0d1 spirv: Emit memory barriers for atomic operations
Add a helper to split the memory semantics into before and after the
operation, and use that result to emit memory barriers.

v2: Be more explicit about which bits we are keeping around when
    splitting memory semantics into a before and after.  For now
    we are ignoring Volatile.  (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho d6992f996b spirv: Parse memory semantics for atomic operations
Including the right storage memory semantic based on the storage class
of the operation.  These will be used later to emit memory barriers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho 901071044e nir/tests: Add copy propagation tests with scoped_memory_barrier
Three groups of tests, effectively defining what cases the
optimization is allowed or prevented

- Redudant loads       (a load  generated the value)
- Propagate SSA values (a store generated the value)
- Propagate a var      (a copy  generated the value)

Change the shader type of the tests to be COMPUTE so
nir_var_mem_shared can also be used.  Doesn't affect the semantic of
the copy propagation.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:56 -07:00
Caio Marcelo de Oliveira Filho 73572abc2a nir: Add scoped_memory_barrier intrinsic
Add a NIR instrinsic that represent a memory barrier in SPIR-V /
Vulkan Memory Model, with extra attributes that describe the barrier:

- Ordering: whether is an Acquire or Release;
- "Cache control": availability ("ensure this gets written in the memory")
  and visibility ("ensure my cache is up to date when I'm reading");
- Variable modes: which memory types this barrier applies to;
- Scope: how far this barrier applies.

Note that unlike in SPIR-V, the "Storage Semantics" and the "Memory
Semantics" are split into two different attributes so we can use
variable modes for the former.

NIR passes that took barriers in consideration were also changed

- nir_opt_copy_prop_vars: clean up the values for the mode of an
  ACQUIRE barrier.  Copy propagation effect is to "pull up a load" (by
  not performing it), which is what ACQUIRE restricts.

- nir_opt_dead_write_vars and nir_opt_combine_writes: clean up the
  pending writes for the modes of an RELEASE barrier.  Dead writes
  effect is to "push down a store", which is what RELEASE restricts.

- nir_opt_access: treat the ACQUIRE and RELEASE as a full barrier for
  the modes.  This is conservative, but since this is a GL-specific
  pass, doesn't make a difference for now.

v2: Fix the scoped barrier handling in copy propagation.  (Jason)
    Add scoped barrier handling to nir_opt_access and
    nir_opt_combine_writes.  (Rhys)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:55 -07:00
Jason Ekstrand 0ebe89459c spirv/info: Add a memorymodel_to_string helper
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-24 11:39:55 -07:00
Timothy Arceri 1961653c89 glsl: remove propagate_invariance() call from the linker
This was added in 586f4a42e7 and became redundant with 34ab9b0947

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-24 13:24:49 +11:00
Timothy Arceri 922801b77d nir: improve nir_variable packing
Before:

/* size: 136, cachelines: 3, members: 10 */

After:

/* size: 128, cachelines: 2, members: 10 */

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
2019-10-24 13:24:40 +11:00
Timothy Arceri c412ff426b nir: fix nir_variable_data packing
Before:

/* size: 60, cachelines: 1, members: 29 */

After:

/* size: 56, cachelines: 1, members: 29 */

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
2019-10-24 13:22:59 +11:00
Marek Olšák 28199aeee5 st/mesa: assign driver locations for VS inputs for NIR before caching
fix up edge flags in the NIR pass, because st/mesa doesn't touch the inputs
after caching

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-10-23 21:12:52 -04:00
Erik Faye-Lund acf1bf47cc Revert "nir: drop support for using load_alpha_ref_float"
This reverts commit 5af272b474.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jose Maria Casanova <jmcasanova@igalia.com>
2019-10-23 13:03:52 +02:00