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Author SHA1 Message Date
Georg Lehmann
6ecbda83f8 aco/ra: remove gfx6/7 subdword paths 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:35 +00:00
Georg Lehmann
d914ff3aa5 aco: add tests for lower_subdword 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:35 +00:00
Georg Lehmann
47566d0df3 aco: add a subdword lowering pass 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:35 +00:00
Georg Lehmann
6b35de971c aco/lower_to_hw: don't use regClass to identify subdword reductions 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:35 +00:00
Samuel Pitoiset
8c4d0b287f radv: emit compute pipelines directly from the cmdbuf 
Using this intermediate CS isn't really useful and it prevents us to
optimize register writes in the near future. This will also be removed
for graphics pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28977>
 2024-05-02 10:39:03 +00:00
Timur Kristóf
72a73a6f8a ac/nir/legacy: Use new pre-rasterization output info helper. 
For legacy VS/TES and GS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:05:52 +02:00
Timur Kristóf
4ac0727f87 ac/nir/ngg: Use new pre-rasterization output info helper. 
For NGG VS/TES and GS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:05:39 +02:00
Timur Kristóf
b1819d60ea ac/nir: Add helper for pre-rasterization output info. 
This is made to unify the handling of outputs in all
different pre-rasterization lowerings.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:05:08 +02:00
Timur Kristóf
039e739eea ac/nir: Move some helpers to new file. 
Also remove nir_builder include from ac_nir.h.
This is done so that driver code doesn't need to be recompiled
when some internal parts of ac/nir in the new helper header
is changed.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:04:53 +02:00
Timur Kristóf
cd66b77af0 aco: Add missing nir_builder include. 
We would like to avoid including it in ac_nir.h
so ACO will need to include nir_builder.h on its own.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:04:04 +02:00
Rohan Garg
e50234de86 anv: allocate space for generated indirect draw id's using the temporary allocation helper 
Generated Indirect Draw's need a small temporary allocate to store draw
id's. Use the new temporary allocation helper to allocate that space.

Fixes: 82d772fa9b ("anv: create new helper for small allocations")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28989>
 2024-05-02 08:32:09 +00:00
Yusuf Khan
482d9fcbf3 nouveau: Fix crash when destination or source screen fences are null 
Fixes: dEQP-EGL.functional.sharing.gles2.multithread.random_egl_sync.*,
one of them, its quite finiky, one may say random

Signed-off-by: Yusuf Khan <yusisamerican@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28618>
 2024-05-02 08:07:49 +00:00
Christian Gmeiner
5aede1a157 etnaviv: isa: Do src swizzle with isaspec 
Remove this logic from the gallium driver and just use the src's as
provided by nir. The special cases, where there is no 1:1 mapping, do
still exist.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28922>
 2024-05-02 07:44:00 +00:00
Jesse Natalie
894f7f4387 nir_opt_algebraic: Add a couple optimizations for lowered unpack(pack()) 
I noticed some unnecessary 64-bit ints in shaders that were using doubles.
Perhaps there's a different missing optimization that should run on the
actual pack/unpack instructions before they're lowered, or maybe I'm just
lowering them too early, but these seem simple enough that we might want
them even for hand-rolled pack/unpack pairs.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27314>
 2024-05-01 21:55:20 +00:00
Iván Briano
a24ed1146d anv: consolidate DestroyPipeline for graphics and graphics_lib 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29011>
 2024-05-01 21:07:28 +00:00
Iván Briano
6223388c73 anv: fix casting to graphics_pipeline_base 
The macro takes the type of the pipeline to check for, but the cast to
base checks for a full graphics pipeline, so if used on a library one it
fails.

Cc: mesa-stable

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29011>
 2024-05-01 21:07:28 +00:00
Marek Olšák
d802aca523 nir/lower_image: support FMASK loads with a 16-bit sample index 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák
a01712874d nir/lower_tex: support FMASK loads with a 16-bit sample index 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák
8f1ae6c7b1 nir: add shader_info::use_aco_amd 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák
fcb627945b nir: add more build helpers 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák
1632948a76 nir: validate src_type of store_output intrinsics, require bit_size >= 16 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Mike Blumenkrantz
0217a7c007 zink: handle swapchain currentExtent special value 
according to spec this is somehow legal

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29003>
 2024-05-01 15:47:53 +00:00
Eric Engestrom
2827ec97f8 lavapipe/ci: skip ray tracing tests that sometimes time out 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29002>
 2024-05-01 15:27:27 +00:00
Eric Engestrom
3369ec9ade lavapipe/ci: generalize flakes list to all formats for these flaky tests 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29002>
 2024-05-01 15:27:27 +00:00
Eric Engestrom
71dded5f25 lavapipe/ci: add flakes seen lately 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29002>
 2024-05-01 15:27:27 +00:00
Eric Engestrom
165e21a5f8 lavapipe/ci: trigger jobs on draw & gallivm changes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29006>
 2024-05-01 16:50:13 +02:00
Eric Engestrom
7586d4fd5c llvmpipe/ci: trigger jobs on draw & gallivm changes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29006>
 2024-05-01 16:50:06 +02:00
Eric Engestrom
e0dae5a322 docs: update calendar for 24.1.0-rc2 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29005>
 2024-05-01 14:30:59 +00:00
Eric Engestrom
8654809dda lavapipe/ci: only run jobs when their corresponding files are changed 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004>
 2024-05-01 15:19:36 +02:00
Eric Engestrom
e2b6828981 lavapipe/ci: avoid running all lavapipe jobs when llvmpipe ci is changed 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004>
 2024-05-01 15:19:36 +02:00
Eric Engestrom
e4feeacf59 lavapipe/ci: fix indentation 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004>
 2024-05-01 15:19:36 +02:00
Eric Engestrom
b38f52482b llvmpipe/ci: only run jobs when their corresponding files are changed 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004>
 2024-05-01 15:19:36 +02:00
Eric Engestrom
d9fafdad06 llvmpipe/ci: fix indentation 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29004>
 2024-05-01 15:19:36 +02:00
Eric Engestrom
47f6e24ad5 meson: move tsan-blacklist.txt to build-support with the other build support files 
Fixes: 0d46e0e88b ("meson: Add blacklist when compiling with tsan")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28996>
 2024-05-01 07:05:12 +00:00
Kenneth Graunke
84139470a5 intel/brw: Use VEC for emit_unzip() 
Helps make SIMD-split code more SSA-friendly.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:54 -07:00
Kenneth Graunke
1b54b4fad5 intel/brw: Use VEC for NIR vec*() sources 
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:50 -07:00
Kenneth Graunke
d4563747d9 intel/brw: Use VEC for output stores 
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:49 -07:00
Kenneth Graunke
f0c29c9b71 intel/brw: Use VEC for FS outputs 
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:49 -07:00
Kenneth Graunke
cbe7a13f2b intel/brw: Use VEC for TCS/TES/GS input/output loads 
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:48 -07:00
Kenneth Graunke
a94e1bd0ac intel/brw: Use VEC for gl_FragCoord 
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:47 -07:00
Kenneth Graunke
d0a24496fd intel/brw: Use VEC for load_const 
This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:45 -07:00
Kenneth Graunke
3c867bf2c7 intel/brw: Add a new VEC() helper. 
This gathers a number of sources into a contiguous vector register.
Eventually, the plan is that it will use a MOV for a single source,
or LOAD_PAYLOAD for multiple sources.  For now, it emits a series of
MOVs to allow us to rewrite a bunch of existing code to use the new
helper, then change them all over at once later.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:42 -07:00
Kenneth Graunke
c194df565a intel/brw: Don't include unnecessary undefined values in texture results 
When emitting a sampler message, we allocate a temporary destination
large enough to hold 4 values (or 5 for sparse).  This is the maximum
size needed to hold any result.  However, we shrink the size written by
the sampler message to skip writing any trailing components that NIR
tells us are never read.  So we may not write the entire temporary.

The NIR texture instruction has a destination VGRF which is sized
assuming that all components are present.  We issue a LOAD_PAYLOAD
instruction to copy our sampler result temporary to the NIR destination.
When we reduce the response length of the sampler messages, then some of
these temporary components have undefined values.  The correct way to
indicate that is by using a BAD_FILE source.  Unfortunately, we were
naively reading offsets of the temporary that were never written, but
are still part of a larger VGRF.  This complicates things.

For example, sampling and only using RGB (not RGBA) was producing this:

   txl_logical(8) (written: 3) vgrf3+0.0:F, ...
   undef(8) (written: 4) vgrf4:UD
   load_payload(8) (written: 4) vgrf4:F, vgrf3+0.0:F, vgrf3+1.0:F, vgrf3+2.0:F, vgrf3+3.0:F

The last source, vgrf3+3.0:F, is undefined, and should be BAD_FILE.
Doing so allows VGRF splitting and other optimizations to work better.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:41 -07:00
Kenneth Graunke
e42914529a intel/brw: Support CSE on more ops 
This has no changes in shader-db or fossil-db, surprisingly, but at
least CSEL will be useful shortly.  Presumably the others may matter
somewhere.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:40 -07:00
Kenneth Graunke
ed3e4c16dc intel/brw: Do not create empty basic blocks when removing instructions 
If there's only a single instruction in a basic block, then removing it
would create an empty block.  We seem to have trouble representing those
as there are no instructions with an IP inside the block; several places
mess up connections.  While most blocks end in control flow instructions
(which are rarely eliminated), ones preceding a DO instruction may end
in an ordinary instruction.  This makes such blocks tricky to merge with
adjacent blocks - they may be between loops.  Any optimization pass may
may find such an instruction and want to eliminate it, and most of them
are unprepared to perform such CFG link surgery.  Nor do we want to make
every pass aware of this issue.

To work around this, we simply replace an instruction with a NOP when
removing it from a block containing only that instruction, leaving the
block in place.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:39 -07:00
Kenneth Graunke
391da3610c intel/brw: Print W/UW immediates correctly 
We were printing 24w as 0x180018d which not only scarily shows the
wrong type, but also the replicated format of the word.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
 2024-04-30 17:16:33 -07:00
Simon Ser
72ed71877c glapi: fix param type in TexGenxOES 
The spec [1] and _mesa_TexGenxOES both agree that it's GLfixed
instead of GLint.

[1]: https://registry.khronos.org/OpenGL/extensions/OES/OES_texture_cube_map.txt

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28825>
 2024-05-01 00:47:59 +02:00
Eric Engestrom
54258c1ee1 lavapipe/ci: skip another test that goes over the timeout 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28995>
 2024-04-30 22:51:03 +02:00
Eric Engestrom
0b739f7db8 lavapipe/ci: add the rest of the failures introduced by the 1.3.8.2 uprev 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28995>
 2024-04-30 22:51:03 +02:00
Eric Engestrom
c7d4b7a59c lavapipe/ci: drop fixed test from failures 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28995>
 2024-04-30 22:51:03 +02:00